CY7B923-SC Cypress Semiconductor Corp, CY7B923-SC Datasheet - Page 8

• Manufacturer Part Number: CY7B923-SC
• Description: TRANSMITTER HOTLINK 28-SOIC
• Manufacturer: Cypress Semiconductor Corp
• Series: HOTlink™r
• Type: Transmitter and Receiverr

Specifications of CY7B923-SC

• Protocol: Fibre Channel
• Voltage - Supply: 4.5 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Drivers/receivers: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 428-1299

Document #: 38-02017 Rev. *C
When the RF pin is asserted HIGH, RDY leaves it normal
mode of operation and is asserted HIGH while the framer
searches the data stream for a K28.5 character. After the
framer has synchronized to a K28.5 character, the Receiver
will assert the RDY pin LOW when the K28.5 character is
present at the parallel output. The RDY pin will then resume
its normal operation as dictated by the MODE and BISTEN
pins.
The normal operation of the RDY pin in encoded mode is to
signal when parallel data is present at the output pins by
pulsing LOW with a 60% LOW/40% HIGH duty cycle. RDY
does not pulse LOW in a field of K28.5 characters; however,
RDY does pulse LOW for the last K28.5 character in the field
or for any single K28.5. In unencoded mode, the normal
operation of the RDY pin is to signal when any K28.5 is at the
parallel output pins.
The Transmitter and Receiver parallel interface timing and
functionality can be made to match the timing and functionality
of either an asynchronous FIFO or a clocked FIFO by appro-
priately connecting signals (See Figure 4). Proper operation of
the FIFO interface depends upon various FIFO-specific access and
response specifications.
The HOTLink Transmitter and Receiver serial interface
provides a seamless interface to various types of media. A
minimal number of external components are needed to
Q0 7,
SC/D,
RVS
CKR
RDY
RF
Q0 7,
SC/D,
RVS
DATA
RDY
CKR
INX
SERIAL DATA IN
FALLING EDGE OF CKR
RDY IS LOW FOR DATA
RF LATCHED ON
DATA
DATA
Figure 2. CY7B933 Receiver Data Pipeline in Encoded Mode
Figure 3. CY7B933 Framing Operation in Encoded Mode
RDY IS HIGH WHILE WAITING FOR K28.5
DATA
DATA
RDY IS HIGH IN FIELD OF K28.5S
RECEIVER LATENCY= 24 t
DATA
K28.5
DATA BOUNDARY CHANGES
CKR STRETCHES AS
properly terminate transmission lines and provide PECL loads.
For proper power supply decoupling, a single 0.01 mF for each
device is all that is required to bypass the VCC and GND pins.
Figure 5 illustrates a HOTLink Transmitter and Receiver interface to
fiber optic and copper media. More information on interfacing
HOTLink to various media can be found in the HOTLink Design
Considerations application note.
CY7B923 HOTLink Transmitter Operating Mode
Description
In normal operation, the Transmitter can operate in either of
two modes. The Encoded mode allows a user to send and
receive eight-bit data and control information without first
converting it to transmission characters. The Bypass mode is
used for systems in which the encoding and decoding is
performed in an external protocol controller.
In either mode, data is loaded into the Input register of the
Transmitter on the rising edge of CKW. The input timing and
functional response of the Transmitter input can be made to
match the timing and functionality of either an asynchronous
FIFO or a clocked FIFO by an appropriate connection of input
signals (see Figure 4). Proper operation of the FIFO interface
depends upon various FIFO-specific access and response specifica-
tions.
DATA
B
+ 10 ns
RDY IS LOW FOR LAST K28.5
RDY IS LOW
FOR K28.5
K28.5
K28.5
DATA
RDY RESUMES
OPERATION
NORMAL
DATA
PARALLEL
DATA OUT
DATA
CY7B923
CY7B933
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