MC145574AAC Freescale Semiconductor, MC145574AAC Datasheet - Page 57

• Manufacturer Part Number: MC145574AAC
• Description: IC TRANSCEIVER ISDN 32-LQFP
• Manufacturer: Freescale Semiconductor
• Type: Transceiverr

Specifications of MC145574AAC

• Voltage - Supply: 4.75 V ~ 5.25 V
• Mounting Type: Surface Mount
• Package / Case: 32-LQFP
• Number Of Line Interfaces: 1
• Control Interface: HDLC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Drivers/receivers: -
• Protocol: -
• Lead Free Status / Rohs Status: Compliant

MOTOROLA
BR10
BR11
BR12
BR13
BR14
NR1
BR2
BR3
BR4
BR5
BR6
BR7
BR9
6.8.4
NR2
NR3
NR4
NR5
NR6
NT
TE
NT
TE
NT
TE
NT
TE
NT
TE
NT
TE
NT
TE
NT
TE
NT
TE
NT
TE
Accessible Monitor Channel Registers
The following register maps indicate the internal SCP registers that are accessible via the Monitor
channel. Items that are in bold print indicate functions that are different to those of the SCP version.
See Sections 8, 9, and 10 for initial register values after a reset.
Activation Indication
Activation Indication
IRQ3
IRQ3
IRQ3 Enable
IRQ3 Enable
Idle B1 Channel
Enable B1 Channel
2B+D GCI Transparent
Loopback
Transparent
Procedures
Procedures
Loopback
Activation
Activation
Reserved
Reserved
RXSC2.1
RXSC4.1
TXSC2.1
TXSC4.1
NT1 Star
Disabled
Disabled
B1 S/T
SC1.1
SC1.1
BPV7
Mode
FV7
Q.1
Q.1
(7)
Rx Info
Rx Info
(3)
Transparent
Active Only
Procedures
NT Enable
D Channel
Loopback
Reserved
Reserved
Freescale Semiconductor, Inc.
TXSC2.2
RXSC2.2
TXSC4.2
RXSC4.2
Ignored
B1 S/T
SC1.2
SC1.2
BPV6
Non–
FV6
Q.2
Q.2
For More Information On This Product,
(6)
Error Indication
Error Indication
Transmit Power Down
IRQ2 Multiframe Reception
IRQ2 Multiframe Reception
IRQ2 Enable
IRQ2 Enable
Idle B2 Channel
Enable B2 Channel
Multiframing
Transparent
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Loopback
Rx INFO
RXSC2.3
RXSC4.3
Reserved
Reserved
TXSC2.3
TXSC4.3
State B1
B2 S/T
Enable
SC1.3
SC1.3
BPV5
FV5
Q.3
Q.3
(5)
MC145574
(2)
Transparent
Map E to D
on GCI Tx
on GCI Tx
Loopback
Reserved
Reserved
RXSC2.4
RXSC4.4
TXSC2.4
TXSC4.4
Rx INFO
State B0
Mute B2
Mute B2
Channel
Invert E
B2 S/T
SC1.4
SC1.4
BPV4
Non–
FV4
Q.4
Q.4
(4)
Not Applicable
Multiframing Detection
IRQ6 FECV Detect
IRQ1 D Channel Collision
IRQ6 Enable
IRQ1 Enable
Invert B1 Channel
Invert B1 Channel
Transparent
on GCI Tx
on GCI Tx
Applicable
Loopback
Free Run
RXSC3.1
RXSC5.1
Reserved
Reserved
TXSC3.1
TXSC5.1
Tx INFO
State B1
Mute B1
Mute B1
GCI B1
Q Qual
BPV3
FV3
GCI
Not
(3)
(1)
Channel to 0
Transparent
Force Echo
Multiframe
Multiframe
Int. Every
Int. Every
Loopback
Reserved
Reserved
RXSC3.2
RXSC5.2
TXSC3.2
TXSC5.2
Tx INFO
State B0
GCI B1
BPV2
Non–
FV2
(2)
LAPD Polarity
LAPD Polarity
Frame Sync
Frame Sync
Return to Normal
IRQ7 NT Term. D Ch. Coll.
Not Applicable
IRQ7 Enable
Not Applicable
Invert B2 Channel
Invert B2 Channel
Swap B1 and B2
Transparent
Loopback
Loopback
Reserved
Reserved
TXSC3.3
RXSC3.3
TXSC5.3
RXSC5.3
Ext. S/T
GCI B2
Control
Control
GCI Tx
BPV1
Force
FV1
(1)
(0)
Transmit 96 kHz
Transparent
Loopback
Activation
Test Signal
Reserved
Reserved
RXSC3.4
RXSC5.4
Timer #2
TXSC3.4
TXSC5.4
GCI B2
Expired
BPV0
Non–
FV0
(0)
6–11