AD1892JRRL Analog Devices Inc, AD1892JRRL Datasheet - Page 2

• Manufacturer Part Number: AD1892JRRL
• Description: IC SAMPLE CONV W/RX 20BIT 28SOIC
• Manufacturer: Analog Devices Inc
• Type: Sample Rate Converterr

Specifications of AD1892JRRL

• Rohs Status: RoHS non-compliant
• Applications: Players, Recorders
• Voltage - Supply, Digital: 4.5 V ~ 5.5 V
• Mounting Type: Surface Mount
• Package / Case: 28-SOIC (7.5mm Width)
• Voltage - Supply, Analog: -

AD1892–SPECIFICATIONS
TEST CONDITIONS UNLESS OTHERWISE NOTED
Supply Voltage
Ambient Temperature
Output Sample Frequency (F
MCLK
Input Word Width
Load Capacitance
All minimums and maximums tested except as noted.
PERFORMANCE
DIGITAL I/O
DIGITAL TIMING
DIGITAL RS-422 RECEIVERS (RXP, RXN Pins Only)
Dynamic Range (20 Hz to 20 kHz, –60 dB Input)
Total Harmonic Distortion + Noise
Interchannel Phase Deviation
V
V
I
I
V
V
Input Capacitance
t
F
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Input Resistance
Min Differential AES/EBU or S/PDIF Input
Input Hysteresis
MCP
PDRP
BDM
LDM
DDP
DDS
DDH
SSU
CCH
CCL
CCP
CSU
CHD
COH
SFPW
SFSU
CSPW
QDH
CLH
CLK
RS
IH
IL
MCLK
IH
IL
OH
OL
(20 Hz to 20 kHz, Full-Scale Input)
(1 kHz Full-Scale Input)
(10 kHz Full-Scale Input)
@ V
@ V
@ I
@ I
IL
IH
OL
OH
= 0 V
= +5.0 V
= 0.5 mA
= –0.5 mA
1
1
MCLK Duty Cycle
MCLK Frequency (1/t
PD/RST LO Pulsewidth
BCLK Propagation Delay from MCLK (to Falling Edge)
LRCLK Propagation Delay from MCLK
Data Propagation Delay from MCLK
Data Output Setup to BCLK
Data Output Hold from BCLK
SYNC Falling Setup to MCLK Rising
CCLK HI Pulsewidth
CCLK LO Pulsewidth
CCLK Period
SDI Setup
SDI Hold
SDO Propagation Delay from CCLK
SFCLK HI Pulsewidth
U/CBIT, INT, ERROR Setup to SFCLK
CSCLK HI Pulsewidth
QDFS HI Pulsewidth
CS HI Pulsewidth
CS Falling Edge to CCLK Rising
PD/RST Rising to MCLK Rising Edge (Only Required
for Synchronizing Multiple Parts)
1
1
SOUT
)
+5.0
25
48.8
25
20
100
1
1
MCP
1
1
)
1
V
kHz
MHz (512
Bits
pF
C
F
–2–
SOUT
)
Min
Min
2.4
Min
40
10
5
8
100
100
1000
10
3
5
Min
200
120
DVDD – (0.5)
1/2 BCLK Period
1/2 BCLK Period
20
20
15
10
100
MCLK Period
MCLK Period
MCLK Period
MCLK Period
Typ
Typ
15
Typ
Typ
20
20
Max
–103
–113
–107
0
Max
0.8
10
10
0.5
Max
60
25
30
30
30
30
Max
Units
dB
dB
dB
dB
Degrees
Units
V
V
V
V
pF
Units
%
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Units
k
mV p-p
mV
A
A
REV. 0