ADV7181BCP Analog Devices Inc, ADV7181BCP Datasheet - Page 71

IC VIDEO DECODER NTSC 64-LFCSP

ADV7181BCP

Manufacturer Part Number
ADV7181BCP
Description
IC VIDEO DECODER NTSC 64-LFCSP
Manufacturer
Analog Devices Inc
Type
Video Decoderr
Datasheets

Specifications of ADV7181BCP

Applications
Recorders, Set-Top Boxes
Voltage - Supply, Analog
3.15 V ~ 3.45 V
Voltage - Supply, Digital
1.65 V ~ 2 V
Mounting Type
Surface Mount
Package / Case
64-LFCSP
Adc/dac Resolution
9b
Screening Level
Industrial
Package Type
LFCSP EP
Pin Count
64
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With
EVAL-ADV7181BEB - BOARD EVALUATION FOR ADV7181
Lead Free Status / RoHS Status
Compliant, Contains lead / RoHS non-compliant
Table 176. Registers 0x09 to 0x0E
Subaddress
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
Register
Reserved.
(Saturation)
Brightness
Hue
Default Value Y
Default Value C
ADI Control
Bit Description
Reserved.
BRI[7:0]. This register controls
the brightness of the video
signal.
HUE[7:0]. This register
contains the value for the color
hue adjustment.
DEF_VAL_EN. Default value
enable.
DEF_VAL_AUTO_EN. Default
value.
DEF_Y[5:0]. Default value Y.
This register holds the Y
default value.
DEF_C[7:0]. Default value C.
Cr and Cb default values are
defined in this register.
DR_STR_S[1:0]. Select the
drive strength of the sync
signals. HS, VS, and F can be
increased or decreased for
EMC or crosstalk reasons.
DR_STR_C[1:0]. Select the
strength of the clock signal
output driver. Can be
increased or decreased for
EMC or crosstalk reasons.
Reserved.
TRI_LLC. Enables the LLC pin
to be three-stated.
Reserved.
Rev. B | Page 71 of 104
7
1
0
0
0
0
0
6
0
0
0
0
1
0
1
5
0
0
0
1
1
0
4
0
0
0
1
1
0
Bit
3
0
0
0
0
1
0
0
1
1
2
0
0
0
1
1
0
1
0
1
1
0
0
0
0
1
0
0
0
1
1
0
0
0
0
0
1
0
0
1
0
1
Register Setting
Free Run mode
dependent on
DEF_VAL_AUTO_EN
Force Free Run mode
on and output blue
screen
Disable Free Run
mode
Enable Automatic Free
Run mode (blue
screen)
Y[7:0] = {DEF_Y[5:0],
0, 0, 0, 0}
Cr[7:0] = {DEF_C[7:4],
0, 0, 0, 0, 0, 0}
Cb[7:0] = {DEF_C[3:0],
0, 0, 0, 0, 0, 0}
Low drive strength
(1×)
Medium-low (2×)
Medium-high (3×)
High drive strength
(4×)
Low drive strength
(1×)
Medium-low (2×)
Medium-high (3×)
High drive strength
(4×)
Set as default
LLC pin active
LLC pin drivers three-
stated
Set as default
Comments
0x00 = 0IRE
0x7F = 100IRE
0x80 = –100IRE
Hue range =
When lock is lost,
Free Run mode
can be enabled
to output stable
timing, clock,
and a set color.
Default Y value
output in free-
run mode.
Default Cb/Cr
value output in
Free Run mode.
Default values
give blue screen
output.
See TOD
(
TIM_OE
(
–90° to +90°
Table 173
Table 174
ADV7181
);
)

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