W83627UHG Nuvoton Technology Corporation of America, W83627UHG Datasheet - Page 120

• Manufacturer Part Number: W83627UHG
• Description: IC I/O CONTROLLER 128-QFP
• Manufacturer: Nuvoton Technology Corporation of America

Specifications of W83627UHG

• Applications: PC's, PDA's
• Interface: LPC
• Voltage - Supply: 3.3V, 5V
• Package / Case: 128-XFQFN
• Mounting Type: Surface Mount
• Pin Count: 128
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9.3.9
This register is used to control the data rate. In PC/AT and PS/2 mode, the bit definitions are as
follows:
In the PS/2 Model 30 mode, the bit definitions are as follows:
DEFAULT
DEFAULT
NAME
NAME
BIT
BIT
7-2
7-3
1
0
2
1
0
BIT
BIT
Configuration Control Register (CC Register) (Write base address + 7)
RESERVED. Should be set to 0.
DRATE 1.
DRATE 0.
RESERVED. Should be set to 0.
NOPREC. Disables the precompensation function. This bit can be set by the software.
DRATE1.
DRATE0.
NA
NA
7
7
NA
NA
6
6
RESERVED
NA
NA
5
5
RESERVED
DESCRIPTION
DESCRIPTION
NAN
NA
-109-
4
4
Select the data rate of the FDC. See DR
register bits 1 and 0 (Data Rate Register
(DR Register) (Write base address + 4) for
how the settings correspond to individual
data rates.
Select the data rate of the FDC. See DR
register bits 1 and 0 (Data Rate Register
(DR Register) (Write base address + 4)) for
how the settings correspond to individual
data rates.
NA
NA
3
3
Publication Release Date: May 25, 2007
NOPREC
NA
2
0
2
W83627UHG
DRATE1
DRATE1
1
1
1
1
Revision 1.0
DRATE0
DRATE0
0
0
0
0