Z8601720ASG Zilog, Z8601720ASG Datasheet - Page 79

• Manufacturer Part Number: Z8601720ASG
• Description: IC PCMCIA INTERFACE 100-VQFP
• Manufacturer: Zilog

Specifications of Z8601720ASG

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: *
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table 48.
Programming Internal Registers
Bit Placement
Bit 4
Bit 6-5
Bit 7
Bus Control 1 Register: Address 26h (Continued)
Note:
Bit Name
EN_RW_LONG
IOIS16_CTRL
BVD_CTRL
Registers 26h and 27h are only available on the Z16017 device.
Z86017/Z16017 PCMCIA Interface Solution
Description
Set this bit to 1 to enable the read/write long function when
using the 8-bit to 16-bit mode or internal IOCS16
generation in ATA/IDE pass-through mode.
PCMICA 8-Bit to 16-Bit Access After 512 bytes are
transferred, each PC_IOR/IOW strobe to the data register
will generate a ATA_IOR/IOW strobe on the ATA/IDE
bus. 8-bit to 16-bit accesses of the data register will be
continued after any write access to a task file register other
than the data register.
ATA/IDE PASSTHROUGH mode. When set in ATA/IDE
PASSTHROUGH mode after 256 word accesses of the
data register, the //IOCS16 signal on the host interface de-
asserts until the next data transfer phase. The internal
IOCS16 function must also be enabled. (EN_IOIS_IN=1)
and the IOIS16 ADDR register set to 01 pointing to the
ATA/IDE task file data Register 1F0, 170. Clearing this bit
disables the read/write long function.
IOIS16 source select (see Table 49)
When set to 1, this bit enables the PC_BVD1/STSCHG/
PDIAG and PC_BVD2/SPKR/DASP/DREQ functions.
When cleared, it sets both PC_BVD1/STSCHG/PDIAG
and PC_BVD2/SPKR/DASP /DREQ pins High when in
PCMCIA ATA/IDE memory mode. At Power-On Reset,
set to 0.
Product Specification
PS012002-1201
65