PI7C7300DNAE Pericom Semiconductor, PI7C7300DNAE Datasheet - Page 8

• Manufacturer Part Number: PI7C7300DNAE
• Description: IC PCI-PCI BRIDGE 3PORT 272-BGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C7300DNAE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 272-PBGA
• Mounting Type: Surface Mount
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3 V to 3.6 V
• Supply Current (max): 660 mA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Pericom Semiconductor
15.1
15.2
15.3
16.1
16.2
16.3
16.4
16.5
16.6
17.1
17.2
17.3
17.4
17.5
17.6
18.1
14.1.42
14.1.43
14.1.44
14.1.45
14.1.46
14.1.47
14.1.48
14.1.49
14.1.50
14.1.51
14.1.52
14.1.53
14.1.54
14.1.55
15.3.1
15.3.2
15.3.3
15.3.4
16.1.1
16.1.2
BRIDGE BEHAVIOR.................................................................................................................. 94
IEEE 1149.1 COMPATIBLE JTAG CONTROLLER ............................................................. 97
ELECTRICAL AND TIMING SPECIFICATIONS............................................................... 103
272-PIN PBGA PACKAGE FIGURE ...................................................................................... 107
BRIDGE ACTIONS FOR VARIOUS CYCLE TYPES ............................................................ 95
TRANSACTION ORDERING .................................................................................................. 95
ABNORMAL TERMINATION (INITIATED BY BRIDGE MASTER) ................................. 96
BOUNDARY SCAN ARCHITECTURE .................................................................................. 97
BOUNDARY-SCAN INSTRUCTION SET.............................................................................. 99
TAP TEST DATA REGISTERS................................................................................................ 99
BYPASS REGISTER............................................................................................................... 100
BOUNDARY-SCAN REGISTER ........................................................................................... 100
TAP CONTROLLER ............................................................................................................... 100
MAXIMUM RATINGS ........................................................................................................... 103
3.3V DC SPECIFICATIONS................................................................................................... 104
3.3V AC SPECIFICATIONS................................................................................................... 105
PRIMARY AND SECONDARY BUSES AT 66MH
PRIMARY AND SECONDARY BUSES AT 33MH
POWER CONSUMPTION ...................................................................................................... 106
PART NUMBER ORDERING INFORMATION ................................................................... 107
MASTER ABORT................................................................................................................ 96
PARITY AND ERROR REPORTING.................................................................................. 96
REPORTING PARITY ERRORS......................................................................................... 96
SECONDARY IDSEL MAPPING ....................................................................................... 97
TAP PINS............................................................................................................................ 98
INSTRUCTION REGISTER................................................................................................ 98
SECONDARY SUCCESSFUL I/O WRITE COUNTER REGISTER – OFFSET 84h...... 91
SECONDARY SUCCESSFUL MEMORY READ COUNTER REGISTER – Offset 88h 92
SECONDARY SUCCESSFUL MEMORY WRITE COUNTER REGISTER – OFFSET 8Ch
PRIMARY SUCCESSFUL I/O READ COUNTER REGISTER – OFFSET 90h ............. 92
PRIMARY SUCCESSFUL I/O WRITE COUNTER REGISTER – OFFSET 94h............ 92
PRIMARY SUCCESSFUL MEMORY READ COUNTER REGISTER – OFFSET 98h .. 92
PRIMARY SUCCESSFUL MEMORY WRITE COUNTER REGISTER – OFFSET 9Ch 93
CAPABILITY ID REGISTER – OFFSET B0h ................................................................ 93
NEXT POINTER REGISTER – OFFSET B0h ................................................................ 93
SLOT NUMBER REGISTER – OFFSET B0h................................................................. 93
CHASSIS NUMBER REGISTER – OFFSET B0h........................................................... 93
CAPABILITY ID REGISTER – OFFSET C0h ................................................................ 94
NEXT POINTER REGISTER – OFFSET C0h................................................................ 94
HOT SWAP CONTROL AND STATUS REGISTER – OFFSET C0h ............................. 94
........................................................................................................................................ 92
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CLOCK TIMING .............................. 106
CLOCK TIMING .............................. 106
3-PORT PCI-TO-PCI BRIDGE
November 2005 - Revision 1.01
PI7C7300D