BTS5090-2EKA Infineon Technologies, BTS5090-2EKA Datasheet - Page 17

• Manufacturer Part Number: BTS5090-2EKA
• Description: IC PWR SW HI-SIDE 2CH DSO14-40
• Manufacturer: Infineon Technologies
• Series: PROFET®r
• Type: High Sider

Specifications of BTS5090-2EKA

• Input Type: Non-Inverting
• Number Of Outputs: 2
• On-state Resistance: 170 mOhm
• Current - Output / Channel: 2.5A
• Current - Peak Output: 30A
• Voltage - Supply: 8 V ~ 18 V
• Operating Temperature: -40°C ~ 150°C
• Mounting Type: Surface Mount
• Package / Case: 14-SOIC (0.154", 3.90mm Width)
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.3.2
During demagnetization of inductive loads, energy has to be dissipated in the BTS5090-2EKA. This energy can
be calculated with following equation:
Following equation simplifies under the assumption of
The energy, which is converted into heat, is limited by the thermal design of the component. See
maximum allowed energy dissipation as a function of the load current.
Figure 12
5.4
In case of inverse current, meaning a voltage
will flow from output to
stage follows the state of the IN pin, except if the IN pin goes from OFF to ON during inverse. In that particular
case, the output stage is kept OFF until the inverse current disappears. Nevertheless, the current
be higher than
the affected channel is OFF, the diagnostic will detect an open load at OFF. If the affected channel is ON, the
diagnostic will detect open load at ON (the overtemperature signal is inhibited). At the appearance of
parasitic diagnostic can be observed at the unaffected channel. After, the diagnosis is valid and reflects the output
state. At
function are available.
Data Sheet
PROFET™+ 12V
E
E
=
=
V
1
-- -
2
DS AZ
1000
×
100
V
L I
10
(
1
INV
×
)
0
Maximum Load Inductance
Maximum Energy Dissipation Single Pulse,
Inverse Current Capability
×
2
vanishing, the diagnosis is valid and reflects the output state. During inverse current, no protection
----- -
R
×
I
L
L(INV)
L
⎛
⎝
1
×
–
. Otherwise, the second channel can be corrupted and erratic behavior can be observed. If
V
--------------------------------
--------------------------------
V
S
S
V
–
–
S
V
R
V
V
pin via the body diode of the power transistor (please refer to
DS AZ
L
S
DS AZ
1
(
(
)
)
⎞
⎠
×
ln
⎛
⎝
1
–
--------------------------------
V
S
2
R
V
–
INV
L
V
×
DS AZ
at the OUTput higher than the supply voltage
I
L
(
R
)
17
⎞
⎠
L
+
= 0 Ω.
I
I
L
L
T
3
[A]
J(0)
= 150 °C;
V
S
4
= 13.5V
Figure
Rev. 2.0, 2010-08-02
BTS5090-2EKA
5
EAS90.vsd
Figure 12
V
13). The output
S
I
, a current
INV
Power Stage
should not
V
for the
INV
I
6
(1)
(2)
, a
INV