M45PE20-VMN6P Micron Technology Inc, M45PE20-VMN6P Datasheet - Page 14

• Manufacturer Part Number: M45PE20-VMN6P
• Manufacturer: Micron Technology Inc

Specifications of M45PE20-VMN6P

• Cell Type: NOR
• Density: 2Mb
• Access Time (max): 8ns
• Interface Type: Serial (SPI)
• Boot Type: Not Required
• Address Bus: 1b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC N
• Sync/async: Synchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 256K
• Supply Current: 8mA
• Mounting: Surface Mount
• Pin Count: 8
• Lead Free Status / Rohs Status: Compliant

Operating features
4.7
4.8
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Status register
The status register contains two status bits that can be read by the read status register
(RDSR) instruction. See
of the status register bits.
Protection modes
The environments where non-volatile memory devices are used can be very noisy. No SPI
device can operate correctly in the presence of excessive noise. To help combat this, the
M45PE20 features the following data protection mechanisms:
Power on reset and an internal timer (t
changes while the power supply is outside the operating specification
Program, erase and write instructions are checked that they consist of a number of
clock pulses that is a multiple of eight, before they are accepted for execution
All instructions that modify data must be preceded by a Write Enable (WREN)
instruction to set the Write Enable Latch (WEL) bit. This bit is returned to its reset state
by the following events:
–
–
–
–
–
–
–
The hardware protected mode is entered when Write Protect (W) is driven Low,
causing the first 256 pages of memory to become read-only. When Write Protect (W) is
driven High, the first 256 pages of memory behave like the other pages of memory
The Reset (Reset) signal can be driven Low to protect the contents of the memory
during any critical time, not just during power-up and power-down
In addition to the low power consumption feature, the deep power-down mode offers
extra software protection from inadvertent write, program and erase instructions while
the device is not in active use.
Power-up
Reset (Reset) driven Low
Write disable (WRDI) instruction completion
Page write (PW) instruction completion
Page program (PP) instruction completion
Page erase (PE) instruction completion
Sector erase (SE) instruction completion
Section 6.4: Read status register (RDSR)
PUW
) can provide protection against inadvertent
for a detailed description
M45PE20