AM28F256-150PC AMD (ADVANCED MICRO DEVICES), AM28F256-150PC Datasheet - Page 18

• Manufacturer Part Number: AM28F256-150PC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of AM28F256-150PC

• Lead Free Status / Rohs Status: Not Compliant

ANALYSIS OF PROGRAM TIMING WAVEFORMS
Program Setup/Program
Two-cycle write commands are required for program
operations (section A and B). The first program com-
mand (40h) is a Setup command and does not affect
the array data (section A). The second program com-
mand latches address and data required for program-
ming on the falling and rising edge of WE# respectively
(section B). The rising edge of this WE# pulse (section
B) also initiates the programming pulse. The device is
programmed on a byte by byte basis either sequentially
or randomly.
The program pulse occurs in section C.
18
Command
Bus Cycle
Function
Addresses
Section
WE
OE
Data
CE
V
V
CC
PP
#
#
#
Program
Setup
Write
40h
A
Figure 4. AC Waveforms for Programming Operations
Program Data
Address and
A
Command
Address,
Program
Program
Latch
Write
20h
Data
B
B
Time-out
Program
(10 µs)
N/A
Data
C
In
Am28F256
C
Time-Out
A software timing routine (10 µs duration) must be initi-
ated on the rising edge of the WE# pulse of section B.
Note: An integrated stop timer prevents any possibility
of overprogramming by limiting each time-out period of
10 µs.
Program-Verify
Upon completion of the program timing routine, the mi-
croprocessor must write the program-verify command
(C0h). This command terminates the programming op-
eration on the rising edge of the WE# pulse (section D).
The program-verify command also stages the device
for data verification (section F). Another software timing
routine (6 µs duration) must be executed to allow for
Program)
Program
(Stops
Verify
Write
C0h
D
A0h
D
Transition
Time-out
(6 µs)
E
N/A
E
F
Verification
Compare
Program
Read
Data
Data
F
Out
G
Programming
Proceed per
Algorithm
Standby
N/A
11559G-9
G