AM28F256-150PC AMD (ADVANCED MICRO DEVICES), AM28F256-150PC Datasheet - Page 8

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AM28F256-150PC

Manufacturer Part Number
AM28F256-150PC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of AM28F256-150PC

Lead Free Status / Rohs Status
Not Compliant

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V
voltages). When V
disabled, all inter nal program/erase circuits are
disabled, and the device resets to the read mode. The
device ignores all writes until V
must ensure that the control pins are in the correct logic
state when V
Write Pulse “Glitch” Protection
Noise pulses of less than 10 ns (typical) on OE#, CE#
or WE# will not initiate a write cycle.
FUNCTIONAL DESCRIPTION
Description Of User Modes
Legend:
X = Don’t care, where Don’t Care is either V
Notes:
1. V
2. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 2.
3. 11.5 < V
4. Read operation with V
5. With V
6. Refer to Table 3 for valid D
7. All inputs are Don’t Care unless otherwise stated, where Don’t Care is either V
8. If V
8
Read-Only
Read/Write
CC
of V
the device. Refer to the DC characteristics. When V
addresses except A
rise time and fall time specification of 500 ns minimum.
PPL
< V
CC
PPH
may be grounded, connected with a resistor to ground, or < V
PP
LKO
. 0 V < An < V
ID
1.0 Volt, the voltage difference between V
at high voltage, the standby current is I
CC
< 13.0 V. Minimum V
Read
Standby
Output Disable
Auto-select Manufacturer
Code (Note 2)
Auto-select Device
Code (Note 2)
Read
Standby (Note 5)
Output Disable
Write
(see DC Characteristics section for
> V
CC
LKO
9
Operation
< V
and A
CC
PP
to prevent uninitentional writes.
Table 1.
LKO
+ 2 V, (normal TTL or CMOS input levels, where n = 0 or 9).
= V
IN
0
, the command register is
PPH
during a write operation.
must be held at V
ID
CC
may access array data or the Auto select codes.
rise time and fall time (between 0 and V
Am28F256 Device Bus Operations (Notes 7 and 8)
> V
IL
LKO
or V
. The user
IH
IL
.
CC
levels. V
PP
PP
+ I
and V
Am28F256
PP
= V
CE#
(E#)
V
V
V
V
V
V
V
V
V
PPL
(standby).
PPL
IH
IH
CC
IL
IL
IL
IL
IL
IL
IL
= V
, memory contents can be read but not written or erased.
should not exceed 10.0 volts. Also, the Am28F256 has a V
Logical Inhibit
Writing is inhibited by holding any one of OE# = V
= V
WE# must be a logical zero while OE# is a logical one.
Power-Up Write Inhibit
Power-up of the device with WE# = CE# = V
OE# = V
edge of WE#. The internal state machine is automat-
ically reset to the read mode on power-up.
PP
OE#
(G#)
CC
V
V
V
V
V
V
V
IH
X
X
IH
IH
IH
IL
IL
IL
IL
+ 2.0 V. V
or WE# = V
V
CC
IH
ID
+ 2 V. See DC Characteristics for voltage levels
WE#
(W#)
V
V
V
V
V
V
voltages) is 500 ns.
will not accept commands on the rising
X
X
X
IH
IH
IH
IH
IH
IL
IL
PPH
or V
is the programming voltage specified for
IH
(Note 1)
IH
V
V
V
V
V
V
V
V
V
. To initiate a write cycle CE# and
V
PPH
PPH
PPH
PPH
PPL
PPL
PPL
PPL
PPL
PP
levels. In the Auto select mode all
V
A0
V
A0
A0
A0
X
X
X
X
IH
IL
(Note 3)
(Note 3)
V
V
A9
A9
A9
A9
X
X
X
X
ID
ID
(Note 4)
(Note 6)
HIGH Z
HIGH Z
HIGH Z
HIGH Z
CODE
CODE
D
(A1h)
D
(01h)
IL
IL
D
I/O
OUT
OUT
, CE#
IN
and
PP

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