AM29DL162DT70WCF Spansion Inc., AM29DL162DT70WCF Datasheet - Page 14

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AM29DL162DT70WCF

Manufacturer Part Number
AM29DL162DT70WCF
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of AM29DL162DT70WCF

Cell Type
NOR
Density
16Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Top
Address Bus
21/20Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
FBGA
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
2M/1M
Supply Current
16mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AM29DL162DT70WCF
Manufacturer:
SPANSION
Quantity:
642
30 ns. The automatic sleep mode is independent of
the CE#, WE#, and OE# control signals. Standard ad-
d r es s a c c e s s tim in g s pr ovi d e n ew d a t a w h e n
addresses are changed. While in sleep mode, output
data is latched and always available to the system.
I
automatic sleep mode current specification.
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of re-
setting the device to reading array data. When the
RESET# pin is driven low for at least a period of t
the device immediately terminates any operation in
progress, tristates all output pins, and ignores all
read/write commands for the duration of the RESET#
pulse. The device also resets the internal state ma-
chine to reading array data. The operation that was
interrupted should be reinitiated once the device is
ready to accept another command sequence, to en-
sure data integrity.
Current is reduced for the duration of the RESET#
pulse. When RESET# is held at V
draws CMOS standby current (I
at V
be greater.
14
CC4
Am29DL161D
Am29DL162D
Am29DL163D
Am29DL164D
Part Number
IL
in the DC Characteristics table represents the
Device
but not within V
Megabits
SS
0.5 Mbit
2 Mbit
4 Mbit
8 Mbit
±0.3 V, the standby current will
CC4
Table 2. Am29DL16xD Device Bank Divisions
SS
). If RESET# is held
±0.3 V, the device
fifteen 64 Kbyte/32 Kword
seven 64 Kbyte/32 Kword
three 64 Kbyte/32 Kword
Bank 1
Eight 8 Kbyte/4 Kword,
Eight 8 Kbyte/4 Kword,
Eight 8 Kbyte/4 Kword,
Eight 8 Kbyte/4 Kword
D A T A
Sector Sizes
Am29DL16xD
RP
,
S H E E T
The RESET# pin may be tied to the system reset cir-
cuitry. A system reset would thus also reset the Flash
memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
If RESET# is asserted during a program or erase op-
eration, the RY/BY# pin remains a “0” (busy) until the
internal reset operation is complete, which requires a
time of t
tem can thus monitor RY/BY# to determine whether
the reset operation is complete. If RESET# is asserted
when a program or erase operation is not executing
(RY/BY# pin is “1”), the reset operation is completed
within a time of t
rithms). The system can read data t
RESET# pin returns to V
Refer to the AC Characteristics tables for RESET# pa-
rameters and to Figure 14 for the timing diagram.
Output Disable Mode
When the OE# input is at V
disabled. The output pins are placed in the high
impedance state.
READY
Megabits
15.5 Mbit
14 Mbit
12 Mbit
(during Embedded Algorithms). The sys-
8 Mbit
READY
(not during Embedded Algo-
IH
.
IH
Bank 2
, output from the device is
21533E6 February 26, 2009
64 Kbyte/32 Kword
64 Kbyte/32 Kword
64 Kbyte/32 Kword
64 Kbyte/32 Kword
Sector Sizes
Twenty-eight
Twenty-four
Thirty-one
Sixteen
RH
after the

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