K6T1008C2C-TF70

Manufacturer Part NumberK6T1008C2C-TF70
ManufacturerSamsung Semiconductor
K6T1008C2C-TF70 datasheet
 


Specifications of K6T1008C2C-TF70

Density1MbAccess Time (max)70ns
Sync/asyncAsynchronousArchitectureNot Required
Clock Freq (max)Not RequiredMHzOperating Supply Voltage (typ)5V
Address Bus17bPackage TypeTSOP-I
Operating Temp Range-40C to 85CNumber Of Ports1
Supply Current60mAOperating Supply Voltage (min)4.5V
Operating Supply Voltage (max)5.5VOperating Temperature ClassificationIndustrial
MountingSurface MountPin Count32
Word Size8bNumber Of Words128K
Lead Free Status / Rohs StatusNot Compliant  
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K6T1008C2C Family
Document Title
128K x8 bit Low Power CMOS Static RAM
Revision History
Revision No.
History
0.0
Initial draft
0.1
First revision
- Seperate read and write at I
I
I
Read : 15mA, Write : 35mA
CC =
CC1
1.0
Finalized
- Add 70ns speed bin for commercial product and 85ns speed
bin for industrial.
2.0
Revised
- Improved operating current
Add typical value.
I
Read : 15mA
CC
I
: 90mA
60mA
CC2
- Speed bin change
Remove 45ns from commercial part
Remove 55ns and 100ns from industrial part.
The attached data sheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
, I
CC
CC1
10mA(Remove write current)
1
CMOS SRAM
Draft Date
Remark
November 22, 1995
Design target
April 15, 1996
Preliminary
September 5, 1996
Final
November 5, 1997
Final
Revision 2.0
November 1997

K6T1008C2C-TF70 Summary of contents

  • Page 1

    ... K6T1008C2C Family Document Title 128K x8 bit Low Power CMOS Static RAM Revision History Revision No. History 0.0 Initial draft 0.1 First revision - Seperate read and write Read : 15mA, Write : 35mA CC = CC1 1.0 Finalized - Add 70ns speed bin for commercial product and 85ns speed bin for industrial ...

  • Page 2

    ... SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. GENERAL DESCRIPTION The K6T1008C2C families are fabricated by SAMSUNG s advanced CMOS process technology. The families support various operating temperature ranges and have various package types for user flexibility of system design. The fami- lies also support low data retention voltage for battery back- up operation with low data retention current ...

  • Page 3

    ... Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Functional operation should be restricted to recommended operating condition. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Industrial Temperature Products(-40~85 C) Function Part Name K6T1008C2C-GP70 K6T1008C2C-GF70 K6T1008C2C-TF70 K6T1008C2C-RF70 WE I/O Pin X 1) High-Z ...

  • Page 4

    ... K6T1008C2C Family RECOMMENDED DC OPERATING CONDITIONS Item Symbol Supply voltage Ground Input high voltage Input low voltage Note 1. Commercial Product : and Industrial Product : Overshoot : Vcc+3.0V for 30ns pulse width. 3. Undershoot : -3.0V for 30ns pulse width. 4. Overshoot and undershoot are sampled, not 100% tested. ...

  • Page 5

    ... K6T1008C2C Family AC OPERATING CONDITIONS TEST CONDITIONS (Test Load and Test Input/Output Reference) Input pulse level : 0.8 to 2.4V Input rising and falling time : 5ns Input and output reference voltage : 1.5V Output load (See right) :C =100pF+1TTL L AC CHARACTERISTICS Parameter List Read cycle time ...

  • Page 6

    ... K6T1008C2C Family TIMMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE(1) Address Data Out Previous Data Valid TIMING WAVEFORM OF READ CYCLE(2) Address High-Z Data out NOTES (READ CYCLE and are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage ...

  • Page 7

    ... K6T1008C2C Family TIMING WAVEFORM OF WRITE CYCLE(1) Address Data in Data Undefined Data out TIMING WAVEFORM OF WRITE CYCLE(2) Address Data in Data out High-Z (WE Controlled CW( CW(2) t WP(1) t AS( Data Valid t WHZ (CS Controlled CW(2) AS( WP( Data Valid 7 CMOS SRAM t WR( WR( High-Z Revision 2.0 November 1997 ...

  • Page 8

    ... K6T1008C2C Family TIMING WAVEFORM OF WRITE CYCLE(3) Address Data in Data out NOTES (WRITE CYCLE write occurs during the overlap of a low CS CS going high and WE going low : A write end at the earliest transition among measured from the begining of write to the end of write measured from the CS ...

  • Page 9

    ... K6T1008C2C Family PACKAGE DIMENSIONS 32 DUAL INLINE PACKAGE (600mil) #32 13.60 0.20 0.535 0.008 #1 1. 0.075 32 PLASTIC SMALL OUTLINE PACKAGE (525mil) #32 #1 20.87 0.822 20.47 0.806 +0.100 0.41 -0.050 0. +0.004 0.016 0.028 -0.002 42.31 MAX 1.666 41.91 0.20 1.650 0.008 0.46 0.10 0.018 ...

  • Page 10

    ... K6T1008C2C Family PACKAGE DIMENSIONS 32 THIN SMALL OUTLINE PACKAGE TYPE1 (0820F) +0.10 0.20 -0.05 +0.004 0.008 -0.002 #1 0.50 0.0197 #16 0.25 TYP 0.010 0~8 0.45 ~0.75 0.018 ~0.030 32 THIN SMALL OUTLINE PACKAGE TYPE1 (0820R) +0.10 0.20 -0.05 +0.004 0.008 -0.002 #16 0.50 0.0197 #1 0.25 TYP 0 ...