AM29LV001BB-90EC Spansion Inc., AM29LV001BB-90EC Datasheet - Page 5

• Manufacturer Part Number: AM29LV001BB-90EC
• Manufacturer: Spansion Inc.

Specifications of AM29LV001BB-90EC

• Cell Type: NOR
• Density: 1Mb
• Access Time (max): 90ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 17b
• Operating Supply Voltage (typ): 3/3.3V
• Operating Temp Range: 0C to 70C
• Package Type: TSOP
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 128K
• Supply Current: 12mA
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / Rohs Status: Not Compliant

TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 6
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 7
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 13
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 18
May 5, 2006 21557F4
Requirements for Reading Array Data ..................................... 7
Writing Commands/Command Sequences .............................. 7
Program and Erase Operation Status ...................................... 8
Standby Mode .......................................................................... 8
Automatic Sleep Mode ............................................................. 8
RESET#: Hardware Reset Pin ................................................. 8
Output Disable Mode ................................................................ 8
Autoselect Mode ....................................................................... 9
Sector Protection/Unprotection ............................................... 10
Temporary Sector Unprotect .................................................. 10
Hardware Data Protection ...................................................... 12
Low V
Write Pulse “Glitch” Protection ............................................... 12
Logical Inhibit .......................................................................... 12
Power-Up Write Inhibit ............................................................ 12
Reading Array Data ................................................................ 13
Reset Command ..................................................................... 13
Autoselect Command Sequence ............................................ 13
Byte Program Command Sequence ....................................... 13
Unlock Bypass Command Sequence ..................................... 14
Chip Erase Command Sequence ........................................... 14
Sector Erase Command Sequence ........................................ 15
Erase Suspend/Erase Resume Commands ........................... 15
Command Definitions ............................................................. 17
DQ7: Data# Polling ................................................................. 18
Table 1. Am29LV001B Device Bus Operations ................................ 7
Table 2. Am29LV001B Top Boot Sector Architecture ...................... 9
Table 3. Am29LV001B Bottom Boot Sector Architecture.................. 9
Table 4. Am29LV001B Autoselect Codes....................................... 10
Figure 1. In-System Sector Protect/Unprotect Algorithms ...............11
Figure 2. Temporary Sector Unprotect Operation ...........................12
Figure 3. Program Operation ..........................................................14
Figure 4. Erase Operation ...............................................................16
Table 5. Am29LV001B Command Definitions ................................ 17
Figure 5. Data# Polling Algorithm ...................................................18
CC
Write Inhibit .............................................................. 12
D A T A S H E E T
Am29LV001B
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 22
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 22
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 23
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Key to Switching Waveforms. . . . . . . . . . . . . . . . 25
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26
Erase and Programming Performance . . . . . . . 36
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 36
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 36
PLCC Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 36
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 38
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 40
DQ6: Toggle Bit I .................................................................... 18
DQ2: Toggle Bit II ................................................................... 19
Reading Toggle Bits DQ6/DQ2 ............................................... 19
DQ5: Exceeded Timing Limits ................................................ 19
DQ3: Sector Erase Timer ....................................................... 20
Hardware Reset (RESET#) .................................................... 27
Erase/Program Operations ..................................................... 28
Temporary Sector Unprotect .................................................. 32
Alternate CE# Controlled Erase/Program Operations ............ 34
PL 032—32-Pin Plastic Leaded Chip Carrier ......................... 38
TS 032—32-Pin Standard Thin Small Outline Package ......... 39
Figure 6. Toggle Bit Algorithm ........................................................ 20
Table 6. Write Operation Status..................................................... 21
Figure 7. Maximum Negative Overshoot Waveform ...................... 22
Figure 8. Maximum Positive Overshoot Waveform ........................ 22
Figure 9. I
Sleep Currents) .............................................................................. 24
Figure 10. Typical I
Figure 11. Test Setup ..................................................................... 25
Table 7. Test Specifications ........................................................... 25
Figure 12. Input Waveforms and Measurement Levels ................. 25
Figure 13. Read Operations Timings ............................................. 26
Figure 14. RESET# Timings .......................................................... 27
Figure 15. Program Operation Timings .......................................... 29
Figure 16. Chip/Sector Erase Operation Timings .......................... 30
Figure 17. Data# Polling Timings (During Embedded Algorithms) . 31
Figure 18. Toggle Bit Timings (During Embedded Algorithms) ...... 31
Figure 19. DQ2 vs. DQ6 ................................................................. 32
Figure 20. Temporary Sector Unprotect Timing Diagram .............. 32
Figure 21. In-System Sector Protect/Unprotect Timing Diagram ... 33
Figure 22. Alternate CE# Controlled Write Operation Timings ...... 35
CC1
Current vs. Time (Showing Active and Automatic
CC1
vs. Frequency ........................................... 24
3