S29GL256M10TAIR10 Spansion Inc., S29GL256M10TAIR10 Datasheet - Page 69

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S29GL256M10TAIR10

Manufacturer Part Number
S29GL256M10TAIR10
Description
Manufacturer
Spansion Inc.
Datasheet

Specifications of S29GL256M10TAIR10

Cell Type
NOR
Density
256Mb
Access Time (max)
100ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
25/24Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
3/11.5 to 12.5V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
32M/16M
Supply Current
60mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant
l
February 7, 2007 S29GL-M_00_B8
The device does not require the system to preprogram prior to erase. The Embedded Erase algo-
rithm automatically programs and verifies the entire memory for an all zero data pattern prior to
electrical erase. The system is not required to provide any controls or timings during these
operations.
After the command sequence is written, a sector erase time-out of 50 µs occurs. During the time-
out period, additional sector addresses and sector erase commands can be written. Loading the
sector erase buffer can be done in any sequence, and the number of sectors can be from one
sector to all sectors. The time between these additional cycles must be less than 50 µs, otherwise
erasure may begin. Any sector erase address and command following the exceeded time-out can
or cannot be accepted. It is recommended that processor interrupts be disabled during this time
to ensure all commands are accepted. The interrupts can be re-enabled after the last Sector Erase
command is written. Any command other than Sector Erase or Erase Suspend during the
time-out period resets the device to the read mode. Note that the Secured Silicon Sector,
autoselect, and CFI functions are unavailable when an erase operation is in progress. The system
must rewrite the command sequence and any additional addresses and commands.
The system can monitor DQ3 to determine if the sector erase timer has timed out (See the section
on DQ3: Sector Erase Timer.). The time-out begins from the rising edge of the final WE# pulse in
the command sequence.
When the Embedded Erase algorithm is complete, the device returns to reading array data and
addresses are no longer latched. The system can determine the status of the erase operation by
reading DQ7, DQ6, or DQ2 in the erasing sector. See
these status bits.
Once the sector erase operation starts, only the Erase Suspend command is valid. All other com-
mands are ignored. However, note that a hardware reset immediately terminates the erase
operation. If that occurs, the sector erase command sequence should be reinitiated once the de-
vice returns to reading array data, to ensure data integrity.
Figure 6
mance
Notes:
1.
2.
See
See
Table 34
DQ3: Sector Erase Timer
in
illustrates the algorithm for the erase operation. See
AC Characteristics
and
Table 35
D a t a
No
for program command sequence.
S29GL-M MirrorBit
Figure 6. Erase Operation
Command Sequence
Data Poll to Erasing
for information on the sector erase timer.
Erasure Completed
Bank from System
for parameters, and
Write Erase
(Notes 1, 2)
Data = FFh?
S h e e t
START
Yes
TM
Flash Family
Embedded
Erase
algorithm
in progress
Figure 18
Write Operation Status
for timing diagrams.
Erase and Programming Perfor-
for information on
67

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