MCM69D536TQ8 Freescale Semiconductor, MCM69D536TQ8 Datasheet

MCM69D536TQ8

Manufacturer Part Number

MCM69D536TQ8

Description

Manufacturer

Freescale Semiconductor

Datasheet

1.MCM69D536TQ8.pdf (14 pages)

Specifications of MCM69D536TQ8

Lead Free Status / Rohs Status

Supplier Unconfirmed

Available stocks

Company

Part Number

Manufacturer

Quantity

Price

Company:

Meier Automation Equipment Co., Limited

Part Number:

MCM69D536TQ8

Manufacturer:

MOTOROLA/摩托罗拉

Quantity:

20 000

Current page: 1 of 14
Download datasheet (143Kb)

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

32K x 36 Bit Synchronous

Dual I/O, Dual Address SRAM

words of 36 bits. It features common data input and data output buffers and

incorporates input and output registers on–board with high speed SRAM.

pass–through cycles in combination on the two data ports. The two address ports

(AX, AY) determine the read or write locations for their respective data ports

(DQX, DQY).

external single clock (K). All signal pins except output enables (GX, GY) are

registered on the rising edge of clock (K).

in either direction. The PTX input must be asserted to pass data from port X to

port Y. The PTY will likewise pass data from port Y to port X. A pass–through

operation takes precedence over a read operation.

both ports are read, the reads occur normally. If one port is written and the other

is read, the read from the array will occur before the data is written. If both ports

are written, only the data on DQY will be written to the array.

Suggested Applications

NOTES:

REV 4

1/16/98

MOTOROLA FAST SRAM

Product Family Configurations

MCM69D536

MCM69D618

MCM67Q709A

MCM67Q909

Motorola, Inc. 1998

The MCM69D536 is a 1M–bit static random access memory, organized as 32K

The MCM69D536 allows the user to concurrently perform reads, writes, or

The synchronous design allows for precise cycle control with the use of an

The pass–through feature allows data to be passed from one port to the other,

For the case when AX and AY are the same, certain protocols are followed. If

Single 3.3 V

Fast Access Times: 6/8 ns Max

Throughput of 2.98 Gigabits/Second

Single Clock Operation

Address, Data Input, E1, E2, PTX, PTY, WX, WY, and Data Output

Registers On–Chip

83 MHz Maximum Clock Frequency

Self–Timed Write

Two Bi–Directional Data Buses

Can be Configured as Separate I/O

Pass–Through Feature

Asynchronous Output Enables (GX, GY)

LVTTL Compatible I/O

Concurrent Reads and Writes

176–Pin TQFP Package

1. Tie AX and AY address ports together for the part to function as a single address part.

2. Tie GX high for DQX to be inputs and tie WY high and GY low for DQY to be outputs.

— ATM

— Cell/Frame Buffers — SNA Switches

Number

Part

5% Power Supply

Address

Dual

— Ethernet Switches

Address

Single

Note 1

Dual

I/O

— Routers

— Shared Memory

Separate

Note 2

I/O

Configuration

32K x 36

64K x 18

128K x 9

512K x 9

MCM69D536

3.3 V

5.0 V

V DD

Order this document

176 LEAD TQFP

CASE 1101–01

TQ PACKAGE

by MCM69D536/D

MCM69D536

Related parts for MCM69D536TQ8

Related keywords

MCM69D536TQ8 datasheet
MCM69D536TQ8 data sheet
MCM69D536TQ8 pdf datasheet
MCM69D536TQ8 component
MCM69D536TQ8 part
MCM69D536TQ8 distributor
MCM69D536TQ8 RoHS
MCM69D536TQ8 datasheet download