W39L040Q-90B Winbond Electronics, W39L040Q-90B Datasheet
W39L040Q-90B
Specifications of W39L040Q-90B
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W39L040Q-90B Summary of contents
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... Toggle Bit Timing Diagram.................................................................................................... 23 9. ORDERING INFORMATION ............................................................................................................ 24 10. HOW TO READ THE TOP MARKING ............................................................................................. 25 11. PACKAGE DIMENSIONS ................................................................................................................ 26 11.1 32L PLCC.............................................................................................................................. 26 11.2 32L TSOP ( mm) ......................................................................................................... 26 11.3 32L STSOP ( mm) ....................................................................................................... 27 12. VERSION HISTORY ........................................................................................................................ 28 W39L040 Data Sheet 512K 8 CMOS FLASH MEMORY Publication Release Date: April 14, 2005 - 1 - Revision A6 ...
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... GENERAL DESCRIPTION The W39L040 is a 4Mbit, 3.3-volt only CMOS flash memory organized as 512K erase capability, the 4Mbits of data are divided into 8 uniform sectors of 64 Kbytes, which are composed of 16 smaller even pages with 4 Kbytes. The byte-wide ( 8) data appears on DQ7 The device can be programmed and erased in-system with a standard 3.3V power supply. A 12-volt V is not required ...
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PIN CONFIGURATIONS # ...
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FUNCTIONAL DESCRIPTION 6.1 Device Bus Operation 6.1.1 Read Mode The read operation of the W39L040 is controlled by #CE and #OE, both of which have to be low for the host to obtain data from the outputs. #CE is ...
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The manufacturer and device codes may also be read via the command register, for instance, when the W39L040 is erased or programmed in a system without access to high voltage on the A9 pin. The command sequence is illustrated in ...
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... Refer to the AC Read Characteristics and Waveforms for the specific timing parameters. 6.3.2 Auto-select Command Flash memories are intended for use in applications where the local CPU can alter memory contents. As such, manufacture and device codes must be accessible while the device resides in the target system ...
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The device will automatically provide adequate internally generated program pulses and verify the programmed cell margin. The automatic programming operation is completed when the data on DQ7 (also used as Data Polling) is equivalent to the data written to ...
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Write Operation Status 6.4.1 DQ7: Data Polling The W39L040 device features Data Polling as a method to indicate to the host that the embedded algorithms are in progress or completed. During the Embedded Program Algorithm, an attempt to read ...
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Table of Operating Modes 6.5.1 Device Bus Operations ( 0.5V) ID MODE Read Write Standby Write Inhibit Output Disable Auto select Manufacturers ID Auto select Device ID 6.5.2 Auto-select Codes (High Voltage Method 0.5V) ...
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Command Definitions COMMAND NO. OF 1ST CYCLE (1) DESCRIPTION Cycles Addr. Data Read OUT Chip Erase 6 5555 AA Sector Erase 6 5555 AA Page Erase 6 5555 AA Byte Program 4 5555 AA Top ...
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Embedded Programming Algorithm Increment Address Program Command Sequence (Address/Command): Start Write Program Command Sequence (see below) #Data Polling/ Toggle bit No Last Address ? Yes Programming Completed 5555H/AAH 2AAAH/55H 5555H/A0H Program Address/Program Data Publication Release Date: April 14, 2005 ...
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Embedded Erase Algorithm Write Erase Command Sequence #Data Polling or Toggle Bit Successfully Completed Chip Erase Command Sequence (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H 5555H/10H Start (see below) Pause T Erasure Completed Individual Sector Erase Command Sequence (Address/Command): 5555H/AAH ...
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Embedded #Data Polling Algorithm 6.9 Embedded Toggle Bit Algorithm Start VA = Byte address for programming Read Byte (DQ0 - DQ7) Address = VA = Any of the device addresses being erased No DQ7 = Data ? Yes Pass ...
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Boot Block Lockout Enable Flow Chart Boot Block Lockout Feature Set Flow Load data AA to address 5555 Load data 55 to address 2AAA Load data 80 to address 5555 Load data AA to address 5555 Load data 55 ...
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Software Product Identification and Boot Block Lockout Detection Flow Chart Product Identification Entry (1) Load data AA to address 5555 Load data 55 to address 2AAA Load data 90 to address 5555 Pause 10 S Product Product Identification Identification ...
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ELECTRICAL CHARACTERISTICS 7.1 Absolute maximum Ratings PARAMETER Power Supply Voltage to V Potential SS Operating Temperature Storage Temperature Voltage on Any Pin to Ground Potential except A9 Voltage on A9 Pin to Ground Potential Note: Exposure to conditions beyond ...
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AC Characteristics 7.4.1 AC Test Conditions PARAMETER Input Pulse Levels Input Rise/Fall Time Input/Output Timing Level Output Load 7.5 AC Test Load and Waveform (Including Jig and Scope <5 nS 1.5V/1.5V 1 TTL Gate and C ...
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AC Characteristics, continued 7.5.1 Read Cycle Timing Parameters (V = 3.3V 0. PARAMETER Read Cycle Time Chip Enable Access Time Address Access Time ...
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AC Characteristics, continued 7.5.3 Power-up Timing PARAMETER Power-up to Read Operation Power-up to Write Operation 7.5.4 Data Polling and Toggle Bit Timing Parameters PARAMETER #OE to Data Polling Output Delay #CE to Data Polling Output Delay #OE to Toggle Bit ...
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TIMING WAVEFORMS 8.1 Read Cycle Timing Diagram Address A18-0 #CE # #WE High-Z DQ7-0 8.2 #WE Controlled Command Write Cycle Timing Diagram Address A18-0 #CE #OE #WE DQ7 OLZ T ...
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Timing Waveforms, continued 8.3 #CE Controlled Command Write Cycle Timing Diagram Address A18-0 #CE #OE #WE DQ7-0 8.4 Chip Erase Timing Diagram Address A18-0 5555 DQ7-0 AA #CE # #WE SB0 ...
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Timing Waveforms, continued 8.5 Sector/Page Erase Timing Diagram Address A18-0 5555 DQ7-0 AA #CE # #WE SB0 SA = Sector Address Page Address Please refer to page 9 for detail information 8.6 #DATA Polling Timing ...
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Timing Waveforms, continued 8.7 Toggle Bit Timing Diagram Address A18-0 #WE #CE #OE DQ6 T OEH Publication Release Date: April 14, 2005 - 23 - W39L040 T OES Revision A6 ...
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... W39L040T-90 90 W39L040Q-70 70 W39L040Q-90 90 W39L040P-70B 70 W39L040P-90B 90 W39L040T-70B 70 W39L040T-90B 90 W39L040Q-70B 70 W39L040Q-90B 90 W39L040P-70Z 70 W39L040P-90Z 90 W39L040T-70Z 70 W39L040T-90Z 90 W39L040Q-70Z 70 W39L040Q-90Z 90 Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure. ...
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HOW TO READ THE TOP MARKING Example: The top marking of 32-pin TSOP W39L040T-70 W39L040T-70 2138977A-A12 149OBSA st 1 line: Winbond logo nd 2 line: the part number: W39L040T- line: the lot number th 4 line: the ...
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... Seating Plane 11.2 32L TSOP ( mm 0.10(0.004 Symbol Notes Dimensions D & not include interlead flash. 2. Dimension b1 does not include dambar protrusion/intrusion. 3. Controlling dimension: Inches General appearance spec. should be based on final W39L040 Dimension in Inches Dimension in mm Min. Nom. Max. Min. Nom. Max. A 0.140 3 ...
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Package Dimensions, continued 11.3 32L STSOP ( mm θ Dimension in Inches Symbol Min 0.002 A 2 0.035 b 0.007 E c 0.004 ...
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... Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 - 28 - W39L040 DESCRIPTION Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No. 378 Kwun Tong Rd., Kowloon, Hong Kong TEL: 852-27513100 FAX: 852-27552064 ...