ELANSC400-66AC AMD (ADVANCED MICRO DEVICES), ELANSC400-66AC Datasheet - Page 45

ELANSC400-66AC

Manufacturer Part Number
ELANSC400-66AC
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet

Specifications of ELANSC400-66AC

Cpu Family
Elan
Device Core Size
16/32Bit
Frequency (max)
66MHz
Interface Type
ISA
Program Memory Type
ROMLess
Program Memory Size
Not Required
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
CISC
Operating Temp Range
0C to 95C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
292
Package Type
BGA
Lead Free Status / Rohs Status
Not Compliant

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ELANSC400-66AC
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Notes:
1. Pin states for D31–D16 are listed in Table 6 on page 42.
2. RAS3–RAS0, CASH3–CASH0, CASL3–CASL0, and MWE Suspend state of the pins:
3. C, D, and E output drives are programmable.
4. The data bus D15–D0 has built-in pulldown resistors that are invoked when the data bus signals are inputs.
5. Memory Address MA12 Suspend state of the pin:
6. Memory Address MA4–MA0 pins are shared with the power-on configuration signals so the reset state of the pins has a pull-
Signal Name
[Alternate
Function]
MA10
MA11
MWE
RAS0
RAS1
ROMCS0
ROMCS1
ROMRD
ROMWR
Summary: These pins have built-in pulldown resistors that are invoked by:
Will be three-stated with a pulldown resistor. This will work for CAS-before-RAS refresh, self-refresh, and the DRAM powered down.
Summary: This pin has a built-in pulldown resistor that is invoked by Suspend mode.
down resistor on these signals.
This default configuration will choose: not test mode and an 8-bit ROM/Flash memory accessed by ROMCS0 with the SD
buffer-control signals disabled. The pulldown resistors are from 50 K to 150 K; they need to be overridden by pullup resistors
on the board if other configurations are needed.
These pulldown resistors are disabled after reset; they are not active during normal chip operation.
For configuration signals CFG0, CFG1, CFG2, and CFG3, if the system uses the default configuration, the pulldown resistors
will be active again in Suspend mode. If external pullup resistors are used on the board for a different configuration, the pins
with external pullups will three-state in Suspend mode without pulldown resistors.
The reserved signal on MA4 is only used for AMD testing; it should not be pulled up on the system design. This pin will always
go to three-state with a pulldown resistor in Suspend mode.
Summary: Each pin has a built-in pulldown resistor that is invoked by:
–The RAS and CAS signals remain active if the DRAM interface is configured for CAS-before-RAS refresh in Suspend mode.
–The RAS and CAS signals will be Low if the DRAM is configured for self-refresh in Suspend mode.
–Will be three-stated with a pulldown resistor if the DRAM interface is programmed to be disabled so the DRAM can be
–Will not be affected by this when the RAS and CAS signals that share pins with other functions (RAS3–RAS2, CASH3–
–The MWE signal will be driven out High (deasserted) when the DRAM is programmed to be left powered (Power-Down
–Suspend mode and DRAM interface programmed for power-down in Suspend (Power-Down Group A), and the pins are
–Reset
–Suspend mode and the configuration pin being Low during reset (for CFG3–CFG0).
–Suspend mode for the reserved signal on MA4.
powered down (Power-Down Group A).
CASH2, and CASL3–CASL2) are not enabled to come out of the chip.
Group A).
enabled as RAS/CAS for RAS3–RAS2, CASH3–CASH2, and CASL3–CASL2.
C13
A16
C15
D14
R18
V20
U19
A11
T19
Pin
#
Type
Table 7. Pin State Table—Memory Interface
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
O
O
O
O
O
O
O
O
O
Output
Drive
C–E
C–E
C–E
C–E
C–E
B
B
B
B
3
3
3
3
3
Load
Max
(pF)
70
70
70
50
50
50
50
50
50
Supply
V
V
V
V
V
V
V
V
V
CC
CC
CC
CC
CC
CC
CC
CC
CC
Reset
State
H
H
H
H
H
H
H
L
L
Operation
Normal
O
O
O
O
O
O
O
O
O
1
(Continued)
H[TS-PD][TS]
H[TS-PD][TS]
H[TS-PD][TS]
H[TS-PD][TS]
O[L][TS-PD]
O[L][TS-PD]
H[TS-PD]
Suspend
TS-PD
TS-PD
State
Power
Group
Down
A
A
A
B
B
B
B
Note 5 V
8
8
2
2
2
9
9
9
9
S
S
S
S
45

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