ELANSC400-66AC AMD (ADVANCED MICRO DEVICES), ELANSC400-66AC Datasheet - Page 75

• Manufacturer Part Number: ELANSC400-66AC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ELANSC400-66AC

• Cpu Family: Elan
• Device Core Size: 16/32Bit
• Frequency (max): 66MHz
• Interface Type: ISA
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Number Of Timers - General Purpose: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 95C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 292
• Package Type: BGA
• Lead Free Status / Rohs Status: Not Compliant

CFG3 Pin
This configuration pin is used for selecting between the
GPIO_CS4–GPIO_CS2 I/O pins and the SD bus buffer
control signals: DBUFOE, DBUFRDL, and DBUFRDH.
When the buffer control signal configuration is selected
using the CFG3 pin, the DBUFOE, DBUFRDL, and
DBUFRDH signals are driven from boot time on for all
accesses to the peripheral data bus. These signals are
used for the external system bus transceiver control.
See Table 24 for the CFG3 configuration definitions.
BNDSCN_EN Pin
The BNDSCN_EN configuration pin (see Table 25) is
used to enable the boundary scan function I/O pins.
The following pins are configured for their boundary
scan function when BNDSCN_EN is asserted:
BNDSCN_EN Configuration
BNDSCN_TCK
BNDSCN_TMS
BNDSCN_TDI
BNDSCN_TDO
CFG3
0
1
Table 25. BNDSCN_EN Configuration
0
1
Table 24. CFG3 Configuration
Configuration
Enables the GPIO_CS4–GPIO_CS2 signals
on the I/O pins
Enables the SD bus buffer control signals
DBUFOE, DBUFRDL, and DBUFRDH
on the I/O pins
Enables the PC Card function
Enables the boundary scan functions:
BNDSCN_TCK, BNDSCN_TMS,
BNDSCN_TDI, and BNDSCN_TDO
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
75