ADC1005CCJ National Semiconductor, ADC1005CCJ Datasheet - Page 10

• Manufacturer Part Number: ADC1005CCJ
• Description: ADC Single SAR 10-Bit Parallel 20-Pin CDIP
• Manufacturer: National Semiconductor

Specifications of ADC1005CCJ

• Package: 20CDIP
• Resolution: 10 Bit
• Architecture: SAR
• Number Of Analog Inputs: 1
• Differential Input: Yes
• Digital Interface Type: Parallel
• Input Type: Voltage
• Polarity Of Input Voltage: Unipolar

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3.0 THE ANALOG INPUTS
3.1 Analog Differential Voltage Inputs and
Common-Mode Rejection
The differential inputs of these converters reduce the effects
of common-mode input noise, which is defined as noise com-
mon to both selected “+” and “−” inputs (60 Hz is most typical).
The time interval between sampling the “+” input and the “−”
input is half of an internal clock period. The change in the
common-mode voltage during this short time interval can
cause conversion errors. For a sinusoidal common-mode sig-
nal, this error is:
where f
V
at the CLK IN pin.
For a 60 Hz common-mode signal to generate a ¼ LSB error
(1.2 mV) with the converter running at 1.8 MHz, its peak value
would have to be 1.46V. A common-mode signal this large is
much greater than that generally found in data acquisition
systems.
3.2 Input Current
Due to the sampling nature of the analog inputs, short dura-
tion spikes of current enter the “+” input and exit the “−” input
at the clock rising edges during the conversion. These cur-
rents decay rapidly and do not cause errors as the internal
comparator is strobed at the end of a clock period.
3.3 Input Bypass Capacitors
Bypass capacitors at the inputs will average the current
spikes noted in 3.2 and cause a DC current to flow through
the output resistances of the analog signal sources. This
charge pumping action is worse for continuous conversions
with the V
versions with a 1.8 MHz clock frequency with the V
at 5V, this DC current is at a maximum of approximately 5
μA. Therefore, bypass capacitors should not be used at the
analog inputs or the V
kΩ). If input bypass capacitors are necessary for noise filter-
ing and high source resistance is desirable to minimize ca-
pacitor size, the detrimental effects of the voltage drop across
this input resistance, which is due to the average value of the
input current, can be eliminated with a full-scale adjustment
while the given source resistor and input bypass capacitor are
both in place. This is possible because the average value of
the input current is a linear function of the differential input
voltage.
3.4 Input Source Resistance
Large values of source resistance where an input bypass ca-
pacitor is not used, will not cause errors if the input currents
settle out prior to the comparison time. If a low pass filter is
required in the system, use a low valued series resistor (
kΩ) for a passive RC section or add an op amp RC active low
pass filter. For low source resistance applications (
a 4700 pF bypass capacitor at the inputs will prevent pickup
due to series lead induction of a long wire. A 100Ω series
resistor can be used to isolate this capacitor – both the R and
the C are placed outside the feedback loop – from the output
of an op amp, if used.
PEAK
is its peak voltage value and f
CM
IN
(+) input voltage at full scale. For continuous con-
is the frequency of the common-mode signal,
REF
pin for high resistance sources (>1
CLK
5261 Version 8 Revision 2
is the clock frequency
IN
≤
(+) input
0.1 kΩ)
≤
1
Print Date/Time: 2009/08/26 22:47:16
10
3.5 Noise
The leads to the analog inputs (pins 6 and 7) should be kept
as short as possible to minimize input noise coupling. Both
noise and undesired digital clock coupling to these inputs can
cause system errors. The source resistance for these inputs
should, in general, be kept below 1 kΩ. Larger values of
source resistance can cause undesired system noise pickup.
Input bypass capacitors, placed from the analog inputs to
ground, can reduce system noise pickup but can create ana-
log scale errors. See section 3.2, 3.3, and 3.4 if input filtering
is to be used.
4.0 OFFSET AND REFERENCE ADJUSTMENT
4.1 Zero Offset
The zero error of the A/D converter relates to the location of
the first riser of the transfer function and can be measured by
grounding the V(−) input and applying a small magnitude pos-
itive voltage to the V(+) input. Zero error is the difference
between the actual DC input voltage that is necessary to just
cause an output digital code transition from 00 0000 0000 to
00 0000 0001 and the ideal ½ LSB value (½ LSB = 2.45 mV
for V
The zero of the A/D normally does not require adjustment.
However, for cases where V
duced span applications (V
may be desired. The converter can be made to output an all
zero digital code for an arbitrary input by biasing the A/D's
V
operation of the A/D.
4.2 Full Scale
The full-scale adjustment can be made by applying a differ-
ential input voltage that is 1½ LSB down from the desired
analog full-scale voltage range and then adjusting the mag-
nitude of the V
changing from 11 1111 1110 to 11 1111 1111.
4.3 Adjusting for an Arbitrary Analog
Input Voltage Range
If the analog zero voltage of the A/D is shifted away from
ground (for example, to accommodate an analog input signal
that does not go to ground), this new zero reference should
be properly adjusted first. A V
desired zero reference plus ½ LSB (where the LSB is calcu-
lated for the desired analog span, 1 LSB = analog span/1024)
is applied to selected “+” input and the zero reference voltage
at the corresponding “−” input should then be adjusted to just
obtain the 000
The full-scale adjustment should be made [with the proper
V
given by:
where V
V
are ground referenced).
The V
change from 3FF
ment procedure.
For an example see the Zero-Shift and Span-Adjust circuit
below.
IN
IN
MIN
(−) input at that voltage. This utilizes the differential input
(−) voltage applied] by forcing a voltage to the V
REF
= the low end (the offset zero) of the analog range. (Both
REF
= 5.0 V
MAX
(or V
= the high end of the analog input range and
HEX
CC
REF
DC
) voltage is then adjusted to provide a code
HEX
).
001
input for a digital output code that is just
to 3FE
HEX
code transition.
REF
HEX
IN(MIN)
IN
. This completes the adjust-
< 5V), an offset adjustment
(+) voltage that equals this
is not ground and in re-
IN
(+) input