UPD78F0034BGC-8BS-A Renesas Electronics America, UPD78F0034BGC-8BS-A Datasheet - Page 171

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UPD78F0034BGC-8BS-A

Manufacturer Part Number
UPD78F0034BGC-8BS-A
Description
MCU 8-Bit 78K0 CISC 32KB Flash 2.5V/3.3V/5V 64-Pin LQFP
Manufacturer
Renesas Electronics America
Datasheet

Specifications of UPD78F0034BGC-8BS-A

Package
64LQFP
Family Name
78K0
Maximum Speed
12 MHz
Ram Size
1 KB
Program Memory Size
32 KB
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Program Memory Type
Flash
Number Of Programmable I/os
51
Interface Type
3-Wire/UART
On-chip Adc
8-chx10-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
3

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7.3 Clock Generator Control Registers
(1) Processor clock control register (PCC)
The clock generator is controlled by the following two registers.
Note The feedback resistor is required to control the bias point of the oscillation waveform so that the bias point
This register selects the CPU clock and the division ratio, sets main system clock oscillator operation/stop and
sets whether to use the subsystem clock oscillator internal feedback resistor
PCC is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets the value of PCC to 04H.
• Processor clock control register (PCC)
• Oscillation stabilization time select register (OSTS)
is in the middle of the power supply voltage.
When the subsystem clock is not used, the power consumption in the STOP mode can be reduced by setting
bit 6 (FRC) of PCC to 1 (see Figure 7-7 Subsystem Clock Feedback Resistor).
CHAPTER 7 CLOCK GENERATOR
User’s Manual U14046EJ5V0UD
Note
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169

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