MACH211-15VC Lattice, MACH211-15VC Datasheet - Page 15

• Manufacturer Part Number: MACH211-15VC
• Description: CPLD MACH 2 Family 2.5K Gates 64 Macro Cells 66.6MHz EECMOS Technology 5V 44-Pin TQFP
• Manufacturer: Lattice

Specifications of MACH211-15VC

• Package: 44TQFP
• Family Name: MACH 2
• Device System Gates: 2500
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 32
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 66.6 MHz
• Number Of Product Terms Per Macro: 16
• Operating Temperature: 0 to 70 °C

MACH111(SP) AND MACH131(SP) PAL BLOCK
Switch
Matrix
63
0
0
0
4
4
8
8
16
12
12
16
16
16
20
20
24
24
28
28
32
32
MACH 1 & 2 Families
36
36
40
40
43
43
47
47
51
51
Output Enable
Output Enable
for MACH111, MACH131, MACH131SP
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
C
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
for MACH111SP
Asynchronous Reset
Asynchronous Preset
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
13
14
12
15
Output Enable
Output Enable
11
10
4
8
1
2
3
6
9
5
7
0
2
4
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Output
Macro
Cell
Cell
Cell
Cell
Cell
Cell
Cell
Cell
Cell
Cell
Cell
Cell
Cell
Cell
Cell
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
14051K-013
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
Cell
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
15