MACH211-15VC Lattice, MACH211-15VC Datasheet - Page 6

• Manufacturer Part Number: MACH211-15VC
• Description: CPLD MACH 2 Family 2.5K Gates 64 Macro Cells 66.6MHz EECMOS Technology 5V 44-Pin TQFP
• Manufacturer: Lattice

Specifications of MACH211-15VC

• Package: 44TQFP
• Family Name: MACH 2
• Device System Gates: 2500
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 32
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 66.6 MHz
• Number Of Product Terms Per Macro: 16
• Operating Temperature: 0 to 70 °C

6
Output Macrocell
Output Macrocell
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
0
1
2
3
4
5
6
7
0
1
2
3
4
5
6
7
Figure 2. Product Term Clusters and the Logic Allocator
Product Term
Cluster
Table 5. Logic Allocation for MACH111(SP)
Table 6. Logic Allocation for MACH131(SP)
Available Clusters
Available Clusters
n
C
C
C
C
C
C
C
C
C
C
C
C
C
0
1
2
3
4
5
0
1
2
3
4
5
6
C
C
C
, C
, C
, C
, C
, C
, C
, C
, C
, C
, C
, C
, C
, C
0
6
0
, C
, C
, C
1
2
3
4
5
6
1
2
3
4
5
6
7
, C
, C
, C
, C
, C
, C
, C
, C
, C
, C
, C
, C
, C
1
7
1
2
3
4
5
6
7
2
3
4
5
6
7
8
MACH 1 & 2 Families
n-2
To
n+1
*
Allocator
To
Logic
n-1
From
To
n+1
From
n-1
Output Macrocell
From
Output Macrocell
n+2
*
n
*MACH 2 only
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
M
10
11
12
13
14
15
10
11
12
13
14
15
8
9
8
9
To Macrocell
n
Available Clusters
Available Clusters
C
C
C
C
C
C
C
C
C
C
C
C
10
11
12
13
C
10,
11,
12,
13,
9
9,
8
C
C
8,
7
, C
, C
, C
, C
, C
, C
C
14
14,
, C
C
C
C
C
C
C
8,
10,
10
, C
9
11
12
13
14
9,
11,
12,
13,
14,
8
C
C
, C
, C
, C
C
, C
, C
, C
, C
14051K-003
9
15
15
C
C
C
C
C
10
10
11
9
11
12
13
14
15
12
13
14
15