MACH211-15VC Lattice, MACH211-15VC Datasheet - Page 20

• Manufacturer Part Number: MACH211-15VC
• Description: CPLD MACH 2 Family 2.5K Gates 64 Macro Cells 66.6MHz EECMOS Technology 5V 44-Pin TQFP
• Manufacturer: Lattice

Specifications of MACH211-15VC

• Package: 44TQFP
• Family Name: MACH 2
• Device System Gates: 2500
• Number Of Macro Cells: 64
• Maximum Propagation Delay Time: 15 ns
• Number Of User I/os: 32
• Number Of Logic Blocks/elements: 4
• Typical Operating Supply Voltage: 5 V
• Maximum Operating Frequency: 66.6 MHz
• Number Of Product Terms Per Macro: 16
• Operating Temperature: 0 to 70 °C

BLOCK DIAGRAM (MACH131, MACH131SP)
20
4
4
OE
OE
AND Logic Array
AND Logic Array
Logic Allocator
Logic Allocator
I/O
I/O
Macrocells
Macrocells
I/O Cells
Block A
I/O Cells
Block D
16
52 x 70
16
26
26
52 x 70
48
0
and
and
– I/O
– I/O
15
63
16
16
16
16
4
4
4
4
MACH 1 & 2 Families
OE
OE
Switch Matrix
AND Logic Array
AND Logic Array
Logic Allocator
Logic Allocator
I/O
I/O
Macrocells
Macrocells
I/O Cells
I/O Cells
16
16
Block C
52 x 70
26
52 x 70
Block B
26
16
32
and
and
– I/O
– I/O
31
47
16
16
16
16
4
CLK
CLK
0
2
/I
/I
2
4
I
0
3
2,
, CLK
, CLK
I
5
4
1
3
/I
/I
1
4
14051K-009