CY7C1049B-12VXC Cypress Semiconductor Corp, CY7C1049B-12VXC Datasheet - Page 6

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CY7C1049B-12VXC

Manufacturer Part Number
CY7C1049B-12VXC
Description
SRAM Chip Async Single 5V 4M-Bit 512K x 8 12ns 36-Pin SOJ
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1049B-12VXC

Package
36SOJ
Timing Type
Asynchronous
Density
4 Mb
Typical Operating Supply Voltage
5 V
Address Bus Width
19 Bit
Number Of I/o Lines
8 Bit
Number Of Ports
1
Number Of Words
512K
Document #: 38-05169 Rev. *B
Switching Waveforms
Write Cycle No. 1 (CE Controlled)
Write Cycle No. 2 (WE Controlled, OE HIGH During Write)
Notes:
15. Data I/O is high impedance if OE = V
16. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
17. During this period the I/Os are in the output state and input signals should not be applied.
ADDRESS
ADDRESS
DATA I/O
DATA I/O
CE
WE
CE
WE
OE
NOTE 17
(continued)
IH
.
t
SA
t
HZOE
[15, 16]
t
SA
t
t
AW
AW
t
SCE
t
WC
[15, 16]
t
WC
t
PWE
DATA
t
t
PWE
SD
DATA VALID
t
SCE
t
t
SD
IN
SCE
VALID
t
HD
t
t
HA
HA
t
HD
CY7C1049B
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