NUC140LD2CN Nuvoton Technology Corporation of America, NUC140LD2CN Datasheet - Page 372

• Manufacturer Part Number: NUC140LD2CN
• Description: IC MCU 32BIT 64KB FLASH 48LQFP
• Manufacturer: Nuvoton Technology Corporation of America
• Series: NuMicro™ NUC100r

Specifications of NUC140LD2CN

• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: -
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.13.4.3 Disabled Automatic Retransmission
5.13.5 Test Mode
5.13.5.1 Silent Mode
In accordance with the CAN Specification (see ISO11898, 6.3.3 Recovery Management), the
C_CAN provides means for automatic retransmission of frames that have lost arbitration or have
been disturbed by errors during transmission. The frame transmission service will not be
confirmed to the user before the transmission is successfully completed. This means that, by
default, automatic retransmission is enabled. It can be disabled to enable the C_CAN to work
within a Time Triggered CAN (TTCAN, see ISO11898-1) environment.
The Disabled Automatic Retransmission mode is enabled by setting the Disable Automatic
Retransmission ( DAR ) bit in the CAN Control Register to one. In this operation mode, the
programmer has to consider the different behavior of bits TxRqst and NewDat in the Control
Registers of the Message Buffers:
•
NewDat remains set.
•
•
•
Test Mode is entered by setting the Test bit in the CAN Control Register. In Test Mode, bits Tx1 ,
Tx0 , LBack , Silent and Basic in the Test Register are writeable. Bit Rx monitors the state of the
CAN_RX pin and therefore is only readable. All Test Register functions are disabled when the
Test bit is cleared.
The CAN Core can be set in Silent Mode by programming the Silent bit in the Test Register to
one. In Silent Mode, the C_CAN is able to receive valid data frames and valid remote frames, but
it sends only recessive bits on the CAN bus and it cannot start a transmission. If the CAN Core is
required to send a dominant bit (ACK bit, Error Frames), the bit is rerouted internally so that the
CAN Core monitors this dominant bit, although the CAN bus may remain in recessive state. The
Silent Mode can be used to analysis the traffic on a CAN bus without affecting it by the
transmission of dominant bits. Figure 5-78 shows the connection of signals CAN_TX and
CAN_RX to the CAN Core in Silent Mode.
When a transmission starts, bit TxRqst of the respective Message Buffer is cleared, while bit
When the transmission completed successfully, bit NewDat is cleared.
When a transmission fails (lost arbitration or error), bit NewDat remains set.
To restart the transmission, the software should set the bit TxRqst again.
NuMicro™ NUC130/NUC140 Technical Reference Manual
Figure 5-78 CAN Core in Silent Mode
- 372 -
Publication Release Date: June 14, 2011
Revision V2.01