MT48LC4M32B2P-6:GTR Micron Technology Inc, MT48LC4M32B2P-6:GTR Datasheet - Page 64

MT48LC4M32B2P-6:GTR

Manufacturer Part Number
MT48LC4M32B2P-6:GTR
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet

Specifications of MT48LC4M32B2P-6:GTR

Organization
4Mx32
Density
128Mb
Address Bus
14b
Access Time (max)
17/7.5/5.5ns
Maximum Clock Rate
166MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
195mA
Pin Count
86
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Figure 47:
PDF: 09005aef80872800/Source: 09005aef80863355
128MbSDRAMx32_2.fm - Rev. L 1/09 EN
COMMAND
A0-A9, A11
BA0, BA1
DQM 0-3
CKE
CLK
A10
DQ
Write – Full-page Burst
t CMS
t CKS
t AS
t AS
t AS
Notes:
ACTIVE
BANK
T0
ROW
ROW
t CKH
t CMH
t AH
t AH
t AH
t RCD
1. A8, A9, and A11 = “Don’t Care.”
2.
3. Page left open; no
t CL
t
T1
WR must be satisfied prior to PRECHARGE command.
NOP
t CH
t CMS
t CK
t DS
COLUMN m 1
T2
BANK
WRITE
D
IN
t CMH
t DH
m
t
RP.
t DS
D
IN
T3
NOP
m + 1
t DH
64
t DS
D
IN
T4
NOP
256 locations within same row
m + 2
t DH
Full page completed
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DS
D
IN
T5
NOP
m + 3
t DH
(
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(
(
(
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(
(
(
(
(
(
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(
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(
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(
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)
(
(
(
(
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)
)
t DS
Tn + 1
D
IN
NOP
m - 1
t DH
Full-page burst does
not self-terminate. Can
use BURST TERMINATE
command to stop.
©2001 Micron Technology, Inc. All rights reserved.
128Mb: x32 SDRAM
BURST TERM
Timing Diagrams
Tn + 2
DON’T CARE
2, 3
Tn + 3
NOP

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