ADNS-4000 Avago Technologies US Inc., ADNS-4000 Datasheet - Page 16

• Manufacturer Part Number: ADNS-4000
• Description: SENSOR OPTICAL MOUSE LP 8DIP
• Manufacturer: Avago Technologies US Inc.

Specifications of ADNS-4000

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Burst Mode Operation
Burst mode is a special serial port operation mode that
may be used to reduce the serial transaction time for a
motion read. The speed improvement is achieved by con-
tinuous data clocking to or from multiple registers with-
out the need to specify the register address, and by not
requiring the normal delay period between data bytes.
Burst mode is initiated by reading the MOTION_BURST
register (0x63). The ADNS-4000 will respond with the con-
tents of the DELTA_X, DELTA_Y, SQUAL, SHUT_HI, SHUT_
LO, and PIX_MAX and PIX_ACCUM registers in that order.
The burst transaction can be terminated anywhere in the
sequence after the DELTA_Y value by bringing the NCS pin
high. The default “Read First Byte” is DELTA_X content and
is specifi ed in register 0x42 (BURST_READ_FIRST). The ad-
dress that specifi es the “Read First Byte” can be changed
to address 0x00 – 0x02 (PROD_ID – MOTION_ST) or 0x05
– 0x08 (SQUAL – PIX_MAX) by writing to register 0x42.
After reading the MOTION_BURST address (0x63), the mi-
crocontroller must wait t
continuous data bytes. All data bits can be read with no
delay between bytes by driving SCLK at the normal rate.
The data are latched into the output buff er after the last
address bit is received. After the burst transmission is
complete, the micro-controller must raise the NCS line for
at least t
not available for use until it is reset with NCS, even for a
second burst transmission.
Prior to reading MOTION_BURST register (0x63), MOTION_
ST bit in MOTION_ST register (0x02) should be read. Al-
ternatively, read MOTION_BURST register (0x63) only after
MOTION pin is triggered.
Avago Technologies highly recommends the usage of
burst mode operation in optical mouse sensor design ap-
plications.
Power Up Reset
Although ADNS-4000 does have an internal power up self
reset circuitry, it is still highly recommended to follow the
power up sequence below:
i. Apply power
ii. Drive NCS high, then low to reset the SPI port.
iii. Write 0x5a to register 0x3a.
Reset
ADNS-4000 can be reset by writing 0x5a to register 0x3a.
A full reset will thus be executed and any register settings
must be reloaded. The table below shows the state of the
various pins during reset.
State of Signal Pins after VDD is Valid
16
BEXIT
to terminate burst mode. The serial port is
SRAD
before starting to read the
Power Down
The ADNS-4000 can be set to Power Down mode by writ-
ing 0x02 to register 0x0d to disable the sensor. In addi-
tion, the SPI port should not be accessed during power
down. Other ICs on the same SPI bus can be accessed, as
long as the sensor’s NCS pin is not asserted. The table be-
low shows the state of various pins during power down.
To exit Power Down, write 0x5a to register 0x3a to reset
the sensor in order to wake it up. A full reset will thus be
executed. Wait t
register settings must then be reloaded.
Notes:
*
*
Lift Detection Cutoff Algorithm
When the mouse is raised from the tracking surface which
is also known as lifted condition, there is a specifi c z-height
whereby the tracking of the sensor will cease. However
the tracking cutoff height of the ADNS-4000 sensor varies
with the diff erent tracking surfaces. In general to have a
lower tracking cutoff height than the default settings, be-
low is the recommended algorithm illustrated in the form
of a pseudo code.
Pin
NCS
MISO
SCLK
MOSI
XY_LED
Pin
MOTION
NCS
MISO
SCLK
MOSI
XY_LED
NCS pin must be held to 1 (HIGH) if SPI bus is shared with other
devices. It can be in either state if the sensor is the only device in
connected to the host micro-controller.
Reading of registers should only be performed after exiting from the
power down mode. Any read operation during power down will not
refl ect the actual data of the registers.
WAKEUP
During Reset
Ignored
Low
Ignored
Ignored
High
During Power Down
Undefi ned
Functional*
Undefi ned
Functional*
Functional*
Low current
before accessing the SPI port. Any
After Reset
Functional
Depends on NCS
Depends on NCS
Depends on NCS
Functional