C8051T601-GMR Silicon Laboratories Inc, C8051T601-GMR Datasheet - Page 112

• Manufacturer Part Number: C8051T601-GMR
• Description: MCU 8-Bit C8051T60x 8051 CISC 8KB EPROM 1.8V/3V 14-Pin QFN EP T/R
• Manufacturer: Silicon Laboratories Inc

Specifications of C8051T601-GMR

• Package: 14QFN EP
• Device Core: 8051
• Family Name: C8051T60x
• Maximum Speed: 25 MHz
• Ram Size: 256 Byte
• Program Memory Size: 8 KB
• Operating Supply Voltage: 1.8|3 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 8
• Interface Type: I2C/SMBus/UART
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 3

C8051T600/1/2/3/4/5/6
112
SYSCLK
Function
Figure 22.4. Priority Crossbar Decoder Example 1 - No Skipped Pins
Pin Skip
Settings
Special
Signals
CP0A
CEX0
CEX1
CEX2
SDA
RX0
SCL
CP0
Port
TX0
ECI
Pin
T0
T1
0 1 2 3 4 5 6 7
0 0 0 0 0 0 0 x
XBR0
P0
In this example, the crossbar is configured to
assign the UART TX0 and RX0 signals, the
SMBus signals, and the SYSCLK signal. Note
that the SMBus signals are assigned as a pair,
and there are no pins skipped using the XBR0
register.
are used by the peripherals in this configuration.
1
2
3
respectively.
4
All unassigned pins can be used as GPIO or for
other non-crossbar functions.
Rev. 1.2
st
nd
rd
th
TX0 is assigned to P0.4
SYSCLK is assigned to P0.2
SDA and SCL are assigned to P0.0 and P0.1,
RX0 is assigned to P0.5
These boxes represent the port pins which