DS21352L+ Maxim Integrated Products, DS21352L+ Datasheet - Page 122

• Manufacturer Part Number: DS21352L+
• Description: IC TXRX T1 1-CHIP 3.3V 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21352L+

• Function: Single-Chip Transceiver
• Interface: HDLC, T1
• Number Of Circuits: 1
• Voltage - Supply: 3.14 V ~ 3.47 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -

Figure 22-2 TRANSMIT DATA FLOW
FDL HDLC & BOC Controller
DS2152 TRANSMIT DATA FLOW Figure 15.11
RSER
(note#1)
Software Signaling Enable (TCR1.4)
NOTES:
1. TCLK should be tied to RCLK and TSYNC should be tied to
Global Bit 7 Stuffing (TCR1.3)
Bit 7 Zero Suppression Enable (TCR2.0)
TCD1 4:0
TCHBLK
RFSYNC for data to be properly sourced from RSER.
TIR Function Select (CCR4.0)
D4 Yellow Alarm Select (TCR2.1)
KEY:
HDLC/BOC Enable (TBOC.6)
Frame Mode Select (CCR2.7)
TLINK
= Register
= Device Pin
= Selector
Transmit Yellow (TCR1.0)
DS0 insertion enable (TDC1.7)
TIDR
TTR1 to TTR3
F-Bit Pass Through (TCR1.6)
Frame Mode Select (CCR2.7)
Frame Mode Select (CCR2.7)
0
1
TDC1.5
D4 Yellow Alarm Select (TCR2.1)
0
1
0
1
Frame Mode Select (CCR2.7)
CCR4.1
Frame Mode Select (CCR2.7)
Pulse Density Enforcer Enable (CCR3.3)
TCBR1/2/3
TIR1 to TIR3
Transmit Yellow (TCR1.0)
Transmit Yellow (TCR1.0)
TCD2
TCC1 to TCC3
TC1 to TC24
Pulse Density Violation (RIR2.0)
CCR4.2
TFDL
IBCC
TCD
TFDL Select (TCR1.2)
CCR3.1
CRC Pass Through (TCR1.5)
Transmit Blue (TCR1.1)
B8ZS Enable (CCR2.6)
1
0
1
Idle Code / Per
Channel LB
1
FPS or Ft Bit Insertion
0
Per-Channel Code
Software Signaling
Code Generator
D4 Bit 2 Yellow
Alarm Insertion
In-Band Loop
Generation
Bit 7 Stuffing
1
ENGINE
0
HDLC
Insertion
0
122 of 137
Source Mux
0
FDL Mux
0
CRC Calculation
0
F-Bit Mux
AMI or B8ZS Converter /
ESF Yellow Alarm Gen.
1
0
One's Density Monitor
(00FF Hex in the FDL)
TS1 to TS12
Yellow Alarm Gen.
Blue Alarm Gen.
D4 12th Fs Bit
0
1
DS0 Monitor
TPOS TNEG
CRC Mux
TDATA
TSER
&
0
1
Hardware
Signaling
Insertion
1
TSIG
1