DS21352L+ Maxim Integrated Products, DS21352L+ Datasheet - Page 4

IC TXRX T1 1-CHIP 3.3V 100-LQFP

DS21352L+

Manufacturer Part Number
DS21352L+
Description
IC TXRX T1 1-CHIP 3.3V 100-LQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21352L+

Function
Single-Chip Transceiver
Interface
HDLC, T1
Number Of Circuits
1
Voltage - Supply
3.14 V ~ 3.47 V
Current - Supply
75mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
100-LQFP
Includes
DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
16.
17.
18.
19.
20.
21.
22.
23.
24.
25.
LINE INTERFACE FUNCTION .................................................................................................85
16.1 RECEIVE CLOCK AND DATA RECOVERY ....................................................................85
16.2 TRANSMIT WAVE SHAPING AND LINE DRIVING.......................................................86
16.3 JITTER ATTNUATOR..........................................................................................................86
16.4 PROTECTED INTERFACES................................................................................................92
16.5 RECEIVE MONITOR MODE...............................................................................................95
PROGRAMMABLE IN-BAND LOOP CODE GENERATION AND DETECTION ............96
TRANSMIT TRANSPARENCY ..................................................................................................99
JTAG-BOUNDARY SCAN ARCHITECTURE AND TEST ACCESS PORT .......................99
19.1 DESCRIPTION ......................................................................................................................99
19.2 TAP CONTROLLER STATE MACHINE ..........................................................................101
19.3 INSTRUCTION REGISTER ...............................................................................................103
19.4 TEST REGISTERS ..............................................................................................................105
INTERLEAVED PCM BUS OPERATION ..............................................................................109
20.1 CHANNEL INTERLEAVE .................................................................................................111
20.2 FRAME INTERLEAVE.......................................................................................................111
FUNCTIONAL TIMING DIAGRAMS .....................................................................................111
RECEIVE AND TRANSMIT DATA FLOW DIAGRAMS.....................................................123
OPERATING PARAMETERS...................................................................................................125
AC TIMING PARAMETERS AND DIAGRAMS....................................................................126
24.1 MULTIPLEXED BUS AC CHARACTERISTICS .............................................................126
24.2 NON-MULTIPLEXED BUS AC CHARACTERISTICS ...................................................129
24.3 RECEIVE SIDE AC CHARACTERISTICS .......................................................................132
24.4 TRANSMIT AC CHARACTERISTICS..............................................................................136
MECHANICAL DESCRIPTTION ............................................................................................139
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