DS3171N+ Maxim Integrated Products, DS3171N+ Datasheet - Page 11

• Manufacturer Part Number: DS3171N+
• Description: TXRX SGL DS3/E3 400PBGA
• Manufacturer: Maxim Integrated Products

Specifications of DS3171N+

• Function: Single-Chip Transceiver
• Interface: DS3, E3
• Number Of Circuits: 1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Current - Supply: 273mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 400-BGA
• Includes: DS3 Framers, E3 Framers, HDLC Controller, On-Chip BERTs
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Other names: 90-31710+N00

DS3171/DS3172/DS3173/DS3174
Table 12-13. Per Port Common Register Map ........................................................................................................ 134
Table 12-14. BERT Register Map............................................................................................................................ 144
Table 12-15. Transmit Side B3ZS/HDB3 Line Encoder/Decoder Register Map ..................................................... 152
Table 12-16. Receive Side B3ZS/HDB3 Line Encoder/Decoder Register Map ...................................................... 153
Table 12-17. Transmit Side HDLC Register Map .................................................................................................... 157
Table 12-18. Receive Side HDLC Register Map ..................................................................................................... 161
Table 12-19. FEAC Transmit Side Register Map .................................................................................................... 165
Table 12-20. FEAC Receive Side Register Map ..................................................................................................... 167
Table 12-21. Transmit Side Trail Trace Register Map............................................................................................. 170
Table 12-22. Trail Trace Receive Side Register Map.............................................................................................. 172
Table 12-23. Transmit DS3 Framer Register Map .................................................................................................. 176
Table 12-24. Receive DS3 Framer Register Map ................................................................................................... 178
Table 12-25. Transmit G.751 E3 Framer Register Map .......................................................................................... 187
Table 12-26. Receive G.751 E3 Framer Register Map ........................................................................................... 189
Table 12-27. Transmit G.832 E3 Framer Register Map .......................................................................................... 195
Table 12-28. Receive G.832 E3 Framer Register Map ........................................................................................... 198
Table 12-29. Transmit Clear Channel Register Map ............................................................................................... 207
Table 12-30. Receive Clear Channel Register Map ................................................................................................ 208
Table 13-1. JTAG Instruction Codes ....................................................................................................................... 213
Table 13-2. JTAG ID Codes .................................................................................................................................... 214
Table 14-1. Pin Assignment Breakdown ................................................................................................................. 215
Table 17-1. Recommended DC Operating Conditions ............................................................................................ 220
Table 17-2. DC Electrical Characteristics................................................................................................................ 220
Table 17-3. Output Pin Drive ................................................................................................................................... 221
Table 18-1. Framer Port Timing............................................................................................................................... 224
Table 18-2. Line Interface Timing ............................................................................................................................ 224
Table 18-3. Misc Pin Timing .................................................................................................................................... 225
Table 18-4. Overhead Port Timing .......................................................................................................................... 225
Table 18-5. Micro Interface Timing .......................................................................................................................... 226
Table 18-6. DS3 Waveform Template ..................................................................................................................... 229
Table 18-7. DS3 Waveform Test Parameters and Limits ........................................................................................ 229
Table 18-8. E3 Waveform Test Parameters and Limits........................................................................................... 230
Table 18-9. Receiver Input Characteristics—DS3 Mode......................................................................................... 231
Table 18-10. Receiver Input Characteristics—E3 Mode ......................................................................................... 232
Table 18-11. Transmitter Output Characteristics—DS3 Modes .............................................................................. 232
Table 18-12. Transmitter Output Characteristics—E3 Mode .................................................................................. 232
Table 18-13. JTAG Interface Timing........................................................................................................................ 233
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