MC92501GC Freescale Semiconductor, MC92501GC Datasheet

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... Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information ATM Cell Processor The MC92501 is an Asynchronous Transfer Mode (ATM) Cell Processor layer device composed of dedicated high-performance ingress and egress cell processors combined with UTOPIA Level 2-compliant physical (PHY) and UTOPIA Level 1-compliant switch interface (see Figure 1) ...

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... Freescale Semiconductor, Inc. MC92501 ATM Cell Processor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ii For Technical Assistance iii Data Sheet Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iii Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . iv Product Documentation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v Section 1 Signal Descriptions . . . . . . . . . . . . . . . . . . . .1-1 1.1 Signal Groupings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.2 Power and Ground Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1.3 Control Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 1.4 Processor Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 1 ...

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... Freescale Semiconductor, Inc. FOR TECHNICAL ASSISTANCE: Telephone: Email: Internet: Data Sheet Conventions This data sheet uses the following conventions: OVERBAR Used to indicate a signal that is active when pulled low (For example, the RESET pin is active when low.) asserted Means that a high true (active high) signal is high or that a low true (active low) ...

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... Freescale Semiconductor, Inc. MC92501 New Features in the MC92501 • Implements ATM Layer functions for Broadband ISDN according to ANSI recommendations, ATM Forum UNI 4.0 and TM 4.0 Specifications, ITU recommendations, and Bellcore recommendations. • Provides ABR Relative Rate marking and EFCI marking according to TM 4.0 • ...

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... Freescale Semiconductor, Inc. Product Documentation The three documents listed in the following table are required for complete description of the MC92501 and are necessary to design properly with the part. Documentation is available from one of the following locations (see back cover for detailed information): • A local Motorola distributor • ...

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... Freescale Semiconductor, Inc. MC92501 vi For More Information On This Product, MC92501 Data Sheet Go to: www.freescale.com MOTOROLA ...

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... Freescale Semiconductor, Inc. 1.1 Signal Groupings The input and output signals of the MC92501 are organized into functional groups, as shown in Table 1-1 and as illustrated in Figure 1-1. The MC92501 is operated from a 3.3 V supply; however, some of the inputs can tolerate special note for this feature is added to the signal descriptions of those inputs ...

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... Freescale Semiconductor, Inc. MC92501 VDD AVDD POWER VSS AVSS ARST AMODE0–AMODE1 CONTROL ENID MCLK MADD2–MADD25 MWR MSEL MDS MWSH PROCESSOR MWSL INTERFACE MDTACK0–MDTACK1 MDATA0–MDATA31 MINT MREQ0 MREQ1 MREQ2 RXDATA0–RXDATA7 RXPRTY RXSOC INGRESS RXEMPTY PHY INTERFACE RXENB RXPHYID0– ...

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... Freescale Semiconductor, Inc. 1.2 Power and Ground Signals Table 1-2. Power and Ground Signals Signal Name VDD Input Power AVDD PLL Analog Power— Isolate this input to eliminate coupling of digital switching noise into the PLL VSS System Ground AVSS PLL Analog Ground— Isolate this input to eliminate coupling of digital switching noise into the PLL 1 ...

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... Freescale Semiconductor, Inc. MC92501 1.4 Processor Interface Signals Table 1-4. Processor Interface Signals Signal Signal Name Type MCLK Input MP Clock— This input signal is used as the Microprocessor clock inside the MC92501. This signal drives the microprocessor logic in the MC92501. The duty cycle should be in the range of 40–60%. ...

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... Freescale Semiconductor, Inc. Table 1-4. Processor Interface Signals (Continued) Signal Signal Name Type MDTACK0– Output MP Data Acknowledge 0–1— These tri-statable output signals are used MDTACK1 to indicate the end of an access from the MC92501. At the end of each access, this signal is actively pulled up and then released. The user may program the MC92501 not to drive this signal during certain types of accesses ...

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... Freescale Semiconductor, Inc. MC92501 : Table 1-5. Host Interface Fields WSSM = 1 WSSM = 0 DO-Data Order = 0 MWSH MWSL Note: All Cell Extraction Register, Cell Insertion Register, and General Register accesses are long- word (32-bit) accesses, so both MWSH/A1 and MWSL/SIZE should be asserted low for these write accesses when write-enable mode is selected ...

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... Freescale Semiconductor, Inc. 1.6 Egress PHY Interface Signals Table 1-7. Egress PHY Interface Signals Signal Signal Name Type TXFULL Input Transmit PHY Full— This input signal indicates, when low, that the PHY device is full. TXDATA0– Output Transmit Data Bus— This output data bus transmits octets to the PHY TXDATA7 chip ...

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... Freescale Semiconductor, Inc. MC92501 1.7 PLL Signals Signal Signal Name Type ACLK Input ATMC Master Clock— This input signal is used by the PLL to generate the internal master clock of MC92501. The duty cycle should be in the range of 40–60%. TESTSEL Input This is a dedicated test signal that must be grounded during normal system operation ...

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... Freescale Semiconductor, Inc. Table 1-9. External Memory Interface Signals (Continued) Signal Signal Name Type EACEN Output External Address Compression Enable— This output signal is asserted when data is being written to or read from an external address compression device using the External Memory Data Bus. ...

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... Freescale Semiconductor, Inc. MC92501 1.10 Egress Switch Interface Signals Table 1-11. Egress Switch Interface Signals Signal Signal Name Type STXCLAV Output Transmit Cell Available— This output, when asserted, indicates that the MC92501 is prepared to receive a complete cell. STXDATA0– Input Transmit Data Bus— This input data bus receives bytes from the switch. ...

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... Freescale Semiconductor, Inc. Signal and Packaging Information 2.1 Introduction This section provides information on packaging, including a diagram of the package with signals and tables showing how the signals described in Section 1 are allocated. The MC92501 is available in a 256-lead Glob-Top Ball Grid Array (GTBGA) package. The package mechanical drawing is provided at the end of this section ...

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... Freescale Semiconductor, Inc. MC92501 2.2 GTBGA Package Description A GTBGA package top view is shown in Figure 2-1 with signal and location designators VSS ACLK MADD16 MADD13 MADD9 MADD6 B AVSS TESTSEL VSS MADD15 MADD12 MADD8 C MADD18 AVDD TESTOUT VDD MADD14 MADD11 D MADD19 VCOCTL VDD ...

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... Freescale Semiconductor, Inc. Table 2-1. MC92501 256-Lead GTBGA Package Signal List by Location Signal Location Location Name A1 VSS B1 A2 ACLK B2 A3 MADD16 B3 A4 MADD13 B4 A5 MADD9 B5 A6 MADD6 B6 A7 MADD4 B7 A8 MSEL B8 A9 MINT B9 A10 MWSH/A1 B10 A11 MWSL/SIZE B11 A12 SRXDATA7 ...

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... Freescale Semiconductor, Inc. MC92501 Table 2-1. MC92501 256-Lead GTBGA Package Signal List by Location (Continued) Signal Location Location Name E1 MADD22 H1 E2 MADD21 H2 E3 MADD20 H3 E4 VSS H4 E17 RXDATA3 H17 E18 RXDATA0 H18 E19 EMDATA30 H19 E20 EMDATA27 H20 F1 MDATA0 J1 F2 MADD25 J2 F3 ...

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... Freescale Semiconductor, Inc. Table 2-1. MC92501 256-Lead GTBGA Package Signal List by Location (Continued) Signal Location Location Name U1 TXPHYID2/ V1 TXADDR2 U2 TXDATA0 V2 U3 TXDATA3 V3 U4 VSS V4 U5 TXPRTY V5 U6 VDD V6 U7 STXDATA1 V7 U8 VSS V8 U9 STXCLAV V9 U10 VDD V10 U11 AMODE1 V11 U12 ...

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... Freescale Semiconductor, Inc. MC92501 Table 2-2. MC92501 256-Lead GTBGA Package Signal List by Name Signal Signal Location Name Name A1 A10 EMADD21 ACLK A2 EMADD22 AMODE0 V11 EMADD23 AMODE1 U11 EMADD3 ARST W11 EMADD4 AVDD C2 EMADD5 AVSS B1 EMADD6 EACEN J17 EMADD7 EMADD10 V17 EMADD8 ...

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... Freescale Semiconductor, Inc. Table 2-2. MC92501 256-Lead GTBGA Package Signal List by Name (Continued) Signal Signal Location Name Name MADD18 C1 MDATA16 MADD19 D1 MDATA17 MADD2 B8 MDATA18 MADD20 E3 MDATA19 MADD21 E2 MDATA2 MADD22 E1 MDATA20 MADD23 F3 MDATA21 MADD24 G4 MDATA22 MADD25 F2 MDATA23 MADD3 C8 MDATA24 MADD4 A7 MDATA25 MADD5 ...

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... Freescale Semiconductor, Inc. MC92501 Table 2-2. MC92501 256-Lead GTBGA Package Signal List by Name (Continued) Signal Signal Location Name Name STXDATA0 V6 TXADDR4 STXDATA1 U7 TXCCLR STXDATA2 W6 TXDAT5 STXDATA3 Y6 TXDATA0 STXDATA4 V7 TXDATA1 STXDATA5 W7 TXDATA2 STXDATA6 Y7 TXDATA3 STXDATA7 V8 TXDATA4 STXENB Y5 TXDATA6 STXPRTY W8 TXDATA7 STXSOC Y8 TXENB ...

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... Freescale Semiconductor, Inc. 2.3 GTBGA Mechanical Drawing Figure 2-2. Glob-Top Ball Grid Array (GTBGA) Package MOTOROLA For More Information On This Product, GC Suffix Case 1208-01 MC92501 Data Sheet Go to: www.freescale.com MC92501 2-9 ...

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... Freescale Semiconductor, Inc. MC92501 2-10 For More Information On This Product, MC92501 Data Sheet Go to: www.freescale.com MOTOROLA ...

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... Freescale Semiconductor, Inc. 3.1 Introduction This section provides the following sets of physical and electrical specifications for the MC92501: • Absolute Maximum Ratings • Recommended Operating Conditions • DC Electrical Characteristics • Clocks • Microprocessor Interface Timing • PHY Interface Timing • Switch Interface Timing • ...

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... Freescale Semiconductor, Inc. MC92501 3.2 Absolute Maximum Ratings Table 3-1. Absolute Maximum Ratings Symbol Parameter V DC Supply Voltage Input Voltage (5 V Tolerant Output Voltage OUT I DC Current Drain per Pin, Any Single Input or Output I DC Current Drain VDD and VSS Pins ...

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... Freescale Semiconductor, Inc. 3.4 DC Electrical Characteristics Table 3-3. DC Electrical Characteristics Symbol Parameter V TTL Inputs (5V Tolerant TTL Inputs (5V Tolerant Input Leakage Current Pull Resistor With Pullup Resistor * With Pulldown Resistor * I Output High Current, OH LVTTL Output Type Outputs: EACEN, EMWR, EMADDx, EMBSHx, EMBSLx ...

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... Freescale Semiconductor, Inc. MC92501 3.5 Clocks Num C1 ACLK Cycle Time C2 ACLK Pulse Width Low C3 ACLK Pulse Width High C4 ACLK Rise/Fall Time C5 MCLK Cycle Time C6 MCLK Pulse Width Low C7 MCLK Pulse Width High C8 MCLK Rise/Fall Time C9 SRXCLK/STXCLK Cycle Time C10 SRXCLK/STXCLK Pulse Width Low ...

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... Freescale Semiconductor, Inc. 3.6 Microprocessor Interface Timing The timing diagrams in this section are intended to convey setup and hold values for input signals and propagation delay values for output signals. For functional timing diagrams, see Section 4.5 Microprocessor Interface. Table 3-5. Microprocessor Interface Timings ...

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... Freescale Semiconductor, Inc. MC92501 Table 3-5. Microprocessor Interface Timings (Continued) Num 27 MCLK falling edge to MDTACK asserted for General Register Read 5,6 Accesses 28 MCLK falling edge to MDTACK asserted for General Register Write 5,7 Accesses 29 Access width (MCLK falling edge to MSEL deassertion) for General ...

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... Freescale Semiconductor, Inc. MCLK MSEL 3 MADD [25:2] 3 MWR MDATA [31:0] MDTACK0 MDTACK1 Figure 3-2. Cell Extraction Register Read Access Timing MOTOROLA For More Information On This Product Data Valid MC92501 Data Sheet Go to: www.freescale.com MC92501 15 20 3-7 ...

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... Freescale Semiconductor, Inc. MC92501 MCLK MSEL 3 MADD [25:2] 3 MWR 9 MDATA [31:0] 19 MDTACK Figure 3-3. Maintenance Read Access Timing 3-8 For More Information On This Product Data Valid 22 23 MC92501 Data Sheet Go to: www.freescale.com MOTOROLA ...

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... Freescale Semiconductor, Inc. MCLK MSEL 3 MADD [25:2] 3 MWR MDATA [31:0] MDTACK Figure 3-4. General Register Read Access Timing MOTOROLA For More Information On This Product Data Valid MC92501 Data Sheet Go to: www.freescale.com MC92501 3-9 ...

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... Freescale Semiconductor, Inc. MC92501 MCLK MSEL MADD [25:2] MWR MWSH MWSL MDS MDATA [31:0] MDTACK Figure 3-5. Cell Insertion Register Write Access/Maintenance Write Access Timing 3-10 For More Information On This Product Data Valid MC92501 Data Sheet Go to: www.freescale.com 20 MOTOROLA ...

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... Freescale Semiconductor, Inc. MCLK MSEL 3 MADD [25:2] 3 MWR MWSH MWSL MDS MDATA [31:0] MDTACK Figure 3-6. General Register Write Access Timing MCLK MCIREQ, MCOREQ, EMMREQ Figure 3-7. DMA Request Signals Timing MOTOROLA For More Information On This Product MC92501 Data Sheet Go to: www.freescale.com ...

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... Freescale Semiconductor, Inc. MC92501 3.7 PHY Interface Timing Table 3-6. PHY Interface Timings Num 51 Setup time before ACLK rising edge 52 Hold time after ACLK rising edge 53 Propagation delay from rising edge of ACLK Notes: 1. For a 200 pF load. Add 0.25 ns for each additional 10 pF. For 100 pF subtruct 2.5 ns. ...

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... Freescale Semiconductor, Inc. 3.8 Switch Interface Timing Table 3-7. Switch Interface Timing Num Characteristics 61 Setup time before SRXCLK/STXCLK rising edge 62 Hold time after SRXCLK/STXCLK rising edge 63 Propagation delay from rising edge of SRXCLK/STXCLK 64 SRXCLK rising edge to outputs active 65 SRXCLK rising edge to outputs inactive ...

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... Freescale Semiconductor, Inc. MC92501 3.9 External Memory Interface Timing This section represents External Memory timing parameters for the default definition of the External Memory Timing Configuration Register (EMTCR). These values are for a load pF, which is the rated maximum load for the External Memory interface pins ...

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... Freescale Semiconductor, Inc. EMBSH0–EMBSH3, EMBSL0–EMBSL3, EACEN EMWR EMADD [23:2] EMDATA [31:0] Figure 3-12. External Memory Write Access Timing MOTOROLA For More Information On This Product Data Valid MC92501 Data Sheet Go to: www.freescale.com MC92501 85 88 3-15 ...

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... Freescale Semiconductor, Inc. MC92501 3.9.2 Read Cycle Timing Table 3-9. Read Cycle Timing Num 90 Enable Pulse Width. EMBSH0–EMBSH3, EMBSL0–EMBSL3, EACEN Pulse Width. 92 Address Setup Time. EMBSH0–EMBSH3, EMBSL0–EMBSL3, EACEN High. 93 Address Hold Time. EMADD Invalid to EMBSH0–EMBSH3, EMBSL0– ...

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... Freescale Semiconductor, Inc. EMBSH0–EMBSH3, EMBSL0–EMBSL3, EACEN EMWR EMADD EMDATA [31:0] Figure 3-13. External Memory Read Access Timing MOTOROLA For More Information On This Product MC92501 Data Sheet Go to: www.freescale.com MC92501 Data 3-17 ...

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... Freescale Semiconductor, Inc. MC92501 3-18 For More Information On This Product, MC92501 Data Sheet Go to: www.freescale.com MOTOROLA ...

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... Freescale Semiconductor, Inc. 4.1 Device Identification Register The code for the MC92501 is 0100_0001_1100_0011_1010_0000_0001_1101. 4.2 Boundary Scan Register Table 4-1. MC92501 Boundary Scan Bit Definition Signal I/O Cell Name Type STXCLK in STXCLAV bidir STXSOC bidir STXPRTY bidir STXDATA7 bidir STXDATA6 bidir STXDATA5 ...

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... Freescale Semiconductor, Inc. MC92501 Table 4-1. MC92501 Boundary Scan Bit Definition (Continued) Signal I/O Cell Name Type TXPHYIDV tri-state TXPRTY bidir TXSOC bidir TXDATA7 bidir TXDATA6 bidir TXDATA5 bidir TXDATA4 bidir TXDATA3 bidir TXDATA2 bidir TXDATA1 bidir TXDATA0 bidir TXPHYID3 tri-state ...

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... Freescale Semiconductor, Inc. Table 4-1. MC92501 Boundary Scan Bit Definition (Continued) Signal I/O Cell Name Type MDATA17 bidir MDATA16 bidir MDATA15 bidir MDATA14 bidir MDATA13 bidir MDATA12 bidir MDATA11 bidir MDATA10 bidir MDATA9 bidir MDATA8 bidir MDATA7 bidir MDATA6 bidir MDATA5 ...

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... Freescale Semiconductor, Inc. MC92501 Table 4-1. MC92501 Boundary Scan Bit Definition (Continued) Signal I/O Cell Name Type MADD14 bidir MADD13 bidir MADD12 bidir MADD11 bidir MADD10 bidir MADD9 bidir MADD8 bidir MADD7 bidir MADD6 bidir MADD5 bidir MADD4 bidir MADD3 bidir ...

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... Freescale Semiconductor, Inc. Table 4-1. MC92501 Boundary Scan Bit Definition (Continued) Signal I/O Cell Name Type SRXDATA4 bidir SRXDATA3 bidir SRXDATA2 bidir SRXDATA1 bidir SRXDATA0 bidir SRXCLK in SRXCLAV bidir SRXSOC bidir SRXPRTY bidir MDTACK1 tri-state RXADDR4 tri-state RXSOC bidir RXENB bidir ...

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... Freescale Semiconductor, Inc. MC92501 Table 4-1. MC92501 Boundary Scan Bit Definition (Continued) Signal I/O Cell Name Type EMDATA29 bidir EMDATA28 bidir EMDATA27 bidir EMDATA26 bidir EMDATA25 bidir EMDATA24 bidir EMDATA23 bidir EMDATA22 bidir EMDATA21 bidir EMDATA20 bidir EMDATA19 bidir EACEN tri-state ...

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... Freescale Semiconductor, Inc. Table 4-1. MC92501 Boundary Scan Bit Definition (Continued) Signal I/O Cell Name Type EMDATA2 bidir EMDATA1 bidir EMDATA0 bidir EMADD23 bidir EMADD22 bidir EMADD21 bidir EMADD20 bidir EMADD19 bidir EMADD18 bidir EMADD17 bidir EMADD16 bidir EMADD15 bidir EMADD14 ...

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... Freescale Semiconductor, Inc. MC92501 Table 4-1. MC92501 Boundary Scan Bit Definition (Continued) Signal I/O Cell Name Type EMBSL0 tri-state EMBSL1 tri-state EMBSL2 tri-state EMBSL3 tri-state ARST in enscan1 (core macro) enscan2 (core macro) enscan3 (core macro) enscan4 (core macro) enscan5 (core macro) ...

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... Freescale Semiconductor, Inc. Table 5-1. Ordering Information Supply Part Package Type Voltage MC92501 3.3 V Glob-Top Ball Grid Array (GTBGA) MOTOROLA For More Information On This Product, Ordering Information Pin Count 256 MC92501 Data Sheet Go to: www.freescale.com 5 Order Number MC92501GC 5-1 ...

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... Freescale Semiconductor, Inc. MC149570 5-2 For More Information On This Product, MC92501 Data Sheet Go to: www.freescale.com MOTOROLA ...

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... Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com ...

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... Freescale Semiconductor, Inc. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “ ...