PEF 3460 E V1.2-G Infineon Technologies, PEF 3460 E V1.2-G Datasheet

PEF 3460 E V1.2-G

Manufacturer Part Number

PEF 3460 E V1.2-G

Description

IC LINE INTERFACE/FRAMER BGA-272

Manufacturer

Infineon Technologies

Datasheet

1.PEF_3460_E_V1.2-G.pdf (2 pages)

Specifications of PEF 3460 E V1.2-G

Function

Framer, Line Interface Unit (LIU)

Interface

DS3 / E3, E3 / T3, HDLC / PPP

Number Of Circuits

Voltage - Supply

3.3V

Operating Temperature

-40°C ~ 85°C

Mounting Type

Surface Mount

Package / Case

272-BGA

Includes

Analog LOS Detection, Clock Generation, Flag Generation and Detection, Microcontroller

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Current - Supply

Power (watts)

Other names

PEF3460EV1.2X
PEF3460EV12GXP
SP000088005

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Single channel T3/E3 Framer & Line

Interface for ATM, Frame Relay

and PPP/IP.

The TE3-FALC

broadband interface. It includes DS3/E3 framing,

analog line interface, two jitter attenuators and the

mapping of ATM or PPP/HDLC. The TE3-FALC

integrates a microcontroller which is running the

device driver and gathering statistics as managed

MIB objects.

On the line side the TE3-FALC

co-axial cable via transformers. Highly accurate

analog pulse shaping removes the need to measure

cable length and set the Line Build Out.

On the system side, industry standard UTOPIA and

POS-PHY interface as well as a serial clock/data port

are provided. This allows the TE3-FALC

connected to a wide array of Layer 2/3 & 4 network

processors.

Applications

Analog Line Interface

Digital Jitter Attenuator

T E 3 - F A L C

P E F

w w w . i n f i n e o n . c o m

Wireless base stations

LAN/WAN router

DSLAMs

Remote access/concentrator

Multimedia gateways

Single channel T3/E3 analog

receive & transmit circuitry

Identical T3/E3 transformer inter-

face. True software switchable

Clock & data recovery

Analog LOS detection

Single pulse template for all line

length 0 - 450 ft, no need for

setting of Line Build Out

Two separate transmit and receive

jitter attenuators

Meets jitter transfer requirements

All line rate clocks generated

internally, no requirement for

external 34/45 MHz oscillators

Clock generation unit accepts

flexible frequency reference clocks,

4 MHz to 52 MHz

is a complete solution for a T3/E3

3 4 6 0 E

interfaces to a 75

DS3/E3 Framer

ATM Cell Processor

PPP Processor

System Interfaces

to be

E3 Framer supporting G.832,

G.751 & TBR24

DS3 framer supporting M23 and

C-Bit parity modes

Processing of all DS3 overhead

channels including the FEAC and

MDL link

Processing of all E3 overhead

channels such as trail trace

PLCP sub frame for DS3/E3 G.751

allowing the mapping of ATM cells

DS3/E3 BERT unit

Cell processor as per G.804

Mapping cells directly into DS3/E3

frames or via PLCP frame

Bit and byte synchronous HDLC

controller

Generation and detection of flags,

bit stuffing, CRC-16/32

Utopia Level 2 interface 8/16 Bit

POS-PHY interface 8/16 Bit

Serial clock and data interface

8/16 Bit Motorola/Intel processor

interface

also

N e v e r

TE3-FALC

s t o p

R O D U C T

Test and Diagnostic

Embedded Controller

General Features

Key Features

JTAG test port

OCDS debug port

Embedded microcontroller with

all code & data memory

3.3 V I/O CMOS technology

1.8 V core logic supply

P-BGA-272 package

27 x 27 mm body size,

1.27 mm ball pitch

Industrial temperature range

package, -40 °C to +85 °C

Integrated T3/E3 analog

Single pulse template for all line

lengths, no LBO requirement

Jitter attenuation in both Tx and Rx

Full featured DS3/E3 framer

ATM and PPP/HDLC mapping

UTOPIA or POS-PHY interface

Integrated µC running S/W driver

Control via 8/16 Bit Motorola/Intel

µP i/f or inband ATM/PPP

messages

High level message based API

t h i n k i n g .

R I E F

Related parts for PEF 3460 E V1.2-G

PEF 3460 E V1.2-G Summary of contents

Page 1

Single channel T3/E3 Framer & Line Interface for ATM, Frame Relay and PPP/IP. ® The TE3-FALC is a complete solution for a T3/E3 broadband interface. It includes DS3/E3 framing, analog line interface, two jitter attenuators and the mapping of ATM ...

Page 2

... Infineon Technologies Office. Infineon Technologies Components may only be used in life- support devices or systems with the express written approval of Infineon Technologies failure of such components can reasonably be expected to cause the failure of that life-sup- port device or system affect the safety or effectiveness of that device or system ...

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