CY7B9930V-5AI Cypress Semiconductor Corporation., CY7B9930V-5AI Datasheet

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CY7B9930V-5AI

Manufacturer Part Number
CY7B9930V-5AI
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

Specifications of CY7B9930V-5AI

Case
QFP-44L
Features
Cypress Semiconductor Corporation
Document Number: 38-07271 Rev. *C
12–100 MHz (CY7B9930V), or 24–200 MHz (CY7B9940V)
input/output operation
Matched pair output skew < 200 ps
Zero input-to-output delay
10 LVTTL 50% duty-cycle outputs capable of driving 50ω
terminated lines
Commercial temperature range with eight outputs at 200
MHz
Industrial temperature range with eight outputs at 200 MHz
3.3V LVTTL/LV differential (LVPECL), fault-tolerant and hot
insertable reference inputs
Multiply ratios of (1–6, 8, 10, 12)
Operation up to 12x input frequency
Individual output bank disable for aggressive power
management and EMI reduction
Output high impedance option for testing purposes
Fully integrated PLL with lock indicator
Low cycle-to-cycle jitter (<100 ps peak-peak)
Block Diagram
Feedback Bank
REFSEL
Bank 2
Bank 1
REFA+
REFA–
REFB+
REFB–
FBKA
FBDS0
FBDS1
DIS2
DIS1
198 Champion Court
3
3
Phase
Freq.
Detector
Output_Mode
Divide
Matrix
Filter
Functional Description
The CY7B9930V and CY7B9940V High-Speed Multifrequency
PLL Clock Buffers offer user-selectable control over system
clock functions. This multiple output clock driver provides the
system integrator with functions necessary to optimize the timing
of high performance computer or communication systems.
Ten configurable outputs can each drive terminated transmission
lines with impedances as low as 50Ω while delivering minimal and
specified output skews at LVTTL levels. The outputs are arranged
in three banks. The FB feedback bank consists of two outputs,
which allows divide-by functionality from 1 to 12. Any one of
these ten outputs can be connected to the feedback input as well
as driving other inputs.
Selectable reference input is a fault tolerance feature that allows
smooth change over to secondary clock source, when the
primary clock source is not in operation. The reference inputs are
configurable to accommodate both LVTTL or differential
(LVPECL) inputs. The completely integrated PLL reduces jitter
and simplifies board layout.
FS
Single 3.3V ± 10% supply
44-pin TQFP package
3
3
High Speed Multifrequency
San Jose
VCO
1QA0
1QA1
2QA0
2QA1
1QB0
1QB1
QFA0
2QB0
2QB1
QFA1
,
CY7B9930V, CY7B9940V
Control Logic
Divide
Generator
CA 95134-1709
RoboClockII™ Junior,
PLL Clock Buffer
LOCK
Revised August 8, 2007
408-943-2600
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Related parts for CY7B9930V-5AI

CY7B9930V-5AI Summary of contents

Page 1

... Features ■ 12–100 MHz (CY7B9930V), or 24–200 MHz (CY7B9940V) input/output operation ■ Matched pair output skew < 200 ps ■ Zero input-to-output delay ■ 10 LVTTL 50% duty-cycle outputs capable of driving 50ω terminated lines ■ Commercial temperature range with eight outputs at 200 MHz ■ Industrial temperature range with eight outputs at 200 MHz ■ ...

Page 2

... VCO frequency. There are two NOM versions of the RoboClockII Junior, a low speed device (CY7B9930V) where f ranges from 12 MHz to 100 MHz, and NOM a high speed device (CY7B9940V), which ranges from 24 MHz to 200 MHz. The FS setting for each device is shown in The f frequency is seen on “ ...

Page 3

... All clock outputs stay in high impedance mode and all FSMs stay in the deterministic state until DIS2 is deasserted. When DIS2 is deasserted (with OUTPUT_MODE still at MID), the device reenters factory test mode. RoboClockII™ Junior, CY7B9930V, CY7B9940V Page [+] Feedback [+] Feedback ...

Page 4

... Output Buffer Power: Power supply for each output pair. Internal Power: Power supply for the internal circuitry. Device Ground. , LOW indicates a connection to GND, and MID indicates an open connection. Internal termination circuitry CC RoboClockII™ Junior, CY7B9930V, CY7B9940V VCCQ REFA+ REFA – REFSEL REFB– ...

Page 5

... If these inputs are switched, the function and timing of the outputs may glitch and the PLL may require an additional t CC all data sheet limits are achieved. Document Number: 38-07271 Rev. *C CY7B9930V, CY7B9940V Static discharge voltage................................................. >2000V MIL-STD-883, Method 3015) Latch up current......................................................... >±200 mA Operating Range ° ...

Page 6

... Peak- Peak – 100 – 100 ps Peak- Peak 250 –500 500 – 200 200 – 2.0 – – 2.0 – 2.0 0.15 2.0 = 100 MHz for CY7B9930V 200 MHz for CY7B9940V), NOM at maximum frequency and maximum load of CCN Page [+] Feedback [+] Feedback ...

Page 7

... L < 185 MHz 10 pF from 185 to 200 MHz (a) LVTTL AC Test Load 3.3V 2.0V 0.8V GND < (b) TTL Input Test Waveform = MHz from 185 to 200 MHz. L RoboClockII™ Junior, CY7B9930V, CY7B9940V Min. Max. Min. Max. – 10 – 10 – 500 – 500 – ...

Page 8

... PWH PD 2. REF TO DEVICE 1 and DEVICE1 t t PDELTA FB DEVICE2 Document Number: 38-07271 Rev. *C QFA0 or [1:4]Q[A:B]0 t SKEWPR t PWL QFA1 or [1:4]Q[A:B]1 0.8V t CCJ1-3,4-12 [1:4]QA[0:1] t SKEWBNK [1:4]QB[0: SKEW0,1 PDELTA Other Q RoboClockII™ Junior, CY7B9930V, CY7B9940V t SKEWPR t SKEWBNK t ODCV t ODCV t SKEW0,1 Page [+] Feedback [+] Feedback ...

Page 9

... Ordering Information Propagation Max. Speed Ordering Code Delay (ps) (MHz) 500 100 CY7B9930V-5AC 500 100 CY7B9930V-5AI 500 200 CY7B9940V-5AC 500 200 CY7B9940V-5AI 250 100 CY7B9930V-2AC 250 200 CY7B9940V-2AC 250 100 CY7B9930V-2AI 250 200 CY7B9940V-2AI Pb-free 500 100 CY7B9930V-5AXC 500 100 CY7B9930V-5AXCT 500 ...

Page 10

... Package Diagrams RoboClockII is a trademark of Cypress Semiconductor. Document Number: 38-07271 Rev. *C 44-Lead Thin Plastic Quad Flat Pack A44 RoboClockII™ Junior, CY7B9930V, CY7B9940V Page [+] Feedback [+] Feedback ...

Page 11

... Document History Page Document Title: RoboClockII™ Junior, CY7B9930V, CY7B9940V High Speed Multifrequency PLL Clock Buffer Document Number: 38-07271 Orig. of REV. ECN NO. Issue Date Change ** 110536 12/02/01 *A 115109 7/03/02 *B 128463 7/29/03 *C 1346903 8/8/07 WWZ/VED/ © Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product ...

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