CY7C019-20AI Cypress Semiconductor Corporation., CY7C019-20AI Datasheet
CY7C019-20AI
Specifications of CY7C019-20AI
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CY7C019-20AI Summary of contents
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... True Dual-Ported memory cells that allow simultaneous access of the same memory location • 64K x 8 organization (CY7C008) • 128K x 8 organization (CY7C009) • 64K x 9 organization (CY7C018) • 128K x 9 organization (CY7C019) • 0.35-micron CMOS for optimum speed/power [1] • High-speed access: 12 /15/20 ns • ...
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Functional Description The CY7C008/009 and CY7C018/019 are low-power CMOS 64K, 128K x 8/9 dual-port static RAMs. Various arbitration schemes are included on the devices to handle situations when multiple processors access the same piece of data. Two ports are provided ...
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... Typical Standby Current for I (Both ports TTL level) SB1 Typical Standby Current for I (Both ports CMOS level) SB3 Note: 6. This pin is NC for CY7C018. Document #: 38-06041 Rev. *D 100-Pin TQFP (Top View CY7C019 (128K x 9) CY7C018 (64K CY7C008/009 CY7C018/019 [1] -12 12 195 55 0.05 CY7C008/009 ...
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... DC Input Voltage ......................................... –0.5V to +7.0V Notes: 7. The Voltage on any input or I/O pin cannot exceed the power pin during power-up. 8. Pulse width < 20 ns. 9. Industrial parts are available in CY7C009 and CY7C019 only. Document #: 38-06041 Rev. *D Chip Enable (CE is LOW when CE 1R Read/Write Enable ...
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Electrical Characteristics Over the Operating Range Parameter Description V Output HIGH Voltage OH (V =Min –4.0 mA Output LOW Voltage OL (V =Min +4.0 mA Input HIGH Voltage IH V ...
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AC Test Loads and Waveforms 893Ω OUTPUT 347Ω (a) Normal Load (Load 1) AC Test Loads (Applicable to -12 only 50Ω 50Ω 0 OUTPUT C V (a) ...
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Switching Characteristics Over the Operating Range Parameter Description READ CYCLE t Read Cycle Time RC t Address to Data Valid AA t Output Hold From Address Change OHA [14 LOW to Data Valid ACE t OE LOW to ...
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Switching Characteristics Over the Operating Range Parameter Description [19] BUSY TIMING t BUSY LOW from Address Match BLA t BUSY HIGH from Address Mismatch BHA t BUSY LOW from CE LOW BLC t BUSY HIGH from CE HIGH BHC t ...
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Switching Waveforms Read Cycle No. 1 (Either Port Address Access) ADDRESS t OHA DATA OUT PREVIOUS DATA VALID Read Cycle No. 2 (Either Port CE/OE Access DATA OUT I CC CURRENT I SB [22, 24, 25, 26] Read ...
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Switching Waveforms (continued) Write Cycle No. 1: R/W Controlled Timing ADDRESS OE [31 R/W NOTE 33 DATA OUT DATA IN Write Cycle No Controlled Timing ADDRESS [28 R/W DATA IN Notes: 27. ...
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Switching Waveforms (continued) Semaphore Read After Write Timing, Either Side A –A VALID ADRESS 0 2 SEM I R/W OE Timing Diagram of Semaphore Contention A – R/W L SEM L A – ...
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Switching Waveforms (continued) Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 39 LOW. ...
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Switching Waveforms (continued) Busy Timing Diagram No. 1 (CE Arbitration) CE Valid First: L ADDRESS L BUSY R CE Valid First: R ADDRESS L BUSY L Busy Timing Diagram No. 2 (Address ...
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Switching Waveforms (continued) Interrupt Timing Diagrams Left Side Sets INT : R ADDRESS WRITE FFFF (1FFFF for CY7C009/19 R/W L INT R t INS Right Side Clears INT : R ADDRESS R ...
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Architecture The CY7C008/009 and CY7C018/019 consist of an array of 64K and 128K words of 8 and 9 bits each of dual-port RAM cells, I/O and address lines, and control signals (CE, OE, R/W). These control pins permit independent access ...
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If both ports attempt to access the semaphore within t of each other, the semaphore will SPS Table 1. Non-Contending Read/Write Inputs CE R/W OE ...
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... CY7C018-20AC 128K x 9 Asynchronous Dual-Port SRAM Speed (ns) Ordering Code [1] 12 CY7C019-12AC 15 CY7C019-15AC 20 CY7C019-20AC CY7C019-20AI Document #: 38-06041 Rev. *D Package Name Package Type A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Pb-Free Thin Quad Flat Pack A100 ...
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Package Diagram 100-Pin Thin Plastic Quad Flat Pack (TQFP) A100 100-Pin Pb-Free Thin Plastic Quad Flat Pack (TQFP) A100 All products and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-06041 Rev. ...
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Document History Page Document Title: CY7C008/009, CY7C018/019 64K/128K x 8/9 Dual Port Static RAM Document Number: 38-06041 Issue REV. ECN NO. Date ** 110189 09/29/01 *A 113542 04/15/02 *B 122291 12/27/02 *C 236764 SEE ECN *D 393436 See ECN Document ...