CY7C038-20AC Cypress Semiconductor Corporation., CY7C038-20AC Datasheet
CY7C038-20AC
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CY7C038-20AC Summary of contents
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... True Dual-Ported memory cells which allow simulta- neous access of the same memory location • 32K x 16 organization (CY7C027) • 64K x 16 organization (CY7C028) • 32K x 18 organization (CY7C037) • 64K x 18 organization (CY7C038) • 0.35-micron CMOS for optimum speed/power [1] • High-speed access: 12 /15/20 ns • ...
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Functional Description The CY7C027/028 and CY7C037/038 are low-power CMOS 32K, 64K x 16/18 dual-port static RAMs. Various arbitration schemes are included on the devices to handle situations when multiple processors access the same piece of data. Two ports are provided, ...
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... Typical Standby Current for I (Both ports TTL level) SB1 Typical Standby Current for I (Both ports CMOS level) SB3 Note: 7. This pin is NC for CY7C037. Document #: 38-06042 Rev. *C 100-Pin TQFP (Top View CY7C038 (64K x 18) CY7C037 (32K x 18 CY7C027/028 CY7C027/028 CY7C037/038 CY7C037/038 [1] -12 12 195 55 0 ...
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... Input Voltage ............................................... –0.5V to +7.0V Notes: 8. The Voltage on any input or I/O pin cannot exceed the power pin during power-up. 9. Pulse width < 20 ns. 10. Industrial parts are available in CY7C028 and CY7C038 only. Document #: 38-06042 Rev. *C Description Chip Enable (CE is LOW when CE 0 Read/Write Enable ...
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Electrical Characteristics Over the Operating Range Symbol Parameter V Output HIGH Voltage (V = Min –4.0 mA) V Output LOW Voltage (V = Min +4.0 mA) V Input HIGH Voltage IH V ...
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AC Test Loads and Waveforms 893Ω OUTPUT 347Ω (a) Normal Load (Load 1) 3.0V GND AC Test Loads (Applicable to -12 only 50Ω 50Ω 0 OUTPUT C ...
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Switching Characteristics Over the Operating Range Parameter Description READ CYCLE t Read Cycle Time RC t Address to Data Valid AA t Output Hold From Address Change OHA [15 LOW to Data Valid ACE t OE LOW to ...
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Switching Characteristics Over the Operating Range Parameter Description t R/W HIGH after BUSY HIGH (Slave) WH [21] t BUSY HIGH to Data Valid BDD [20] INTERRUPT TIMING t INT Set Time INS t INT Reset Time INR SEMAPHORE TIMING t ...
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Switching Waveforms Read Cycle No. 1 (Either Port Address Access) ADDRESS OHA DATA OUT PREVIOUS DATA VALID Read Cycle No. 2 (Either Port CE/OE Access) CE and DATA OUT ...
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Switching Waveforms (continued) Write Cycle No. 1: R/W Controlled Timing ADDRESS OE [32,33 R/W NOTE 35 DATA OUT DATA IN Write Cycle No Controlled Timing ADDRESS [32,33 R/W DATA IN Notes: 28. ...
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Switching Waveforms (continued) Semaphore Read After Write Timing, Either Side A –A VALID ADRESS SEM I R/W OE Timing Diagram of Semaphore Contention A – R/W L SEM L A –A ...
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Switching Waveforms (continued) Timing Diagram of Read with BUSY (M/S=HIGH) ADDRESS R R/W R DATA ADDRESS L BUSY L DATA OUTL Write Timing with Busy Input (M/S=LOW) R/W BUSY Note: 41 LOW. ...
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Switching Waveforms (continued) Busy Timing Diagram No.1 (CE Arbitration) CE Valid First: L ADDRESS L BUSY R CE Valid First: R ADDRESS L BUSY L Busy Timing Diagram No. 2 (Address Arbitration) ...
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Switching Waveforms (continued) Interrupt Timing Diagrams Left Side Sets INT : R ADDRESS WRITE 7FFF (FFFF for CY7C028/38 R/W L INT R [44] t INS Right Side Clears INT : R ADDRESS R/W R ...
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Architecture The CY7C027/028 and CY7C037/038 consist of an array of 32K and 64K words of 16 and 18 bits each of dual-port RAM cells, I/O and address lines, and control signals (CE, OE, R/W). These control pins permit independent access ...
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When reading a semaphore, all sixteen/eighteen data lines output the semaphore value. The read value is latched in an output register to prevent the semaphore from changing state during a write from the other port. If both ports attempt to ...
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Table 3. Semaphore Operation Example Function I/O –I action Left port writes 0 to semaphore Right port writes 0 to semaphore Left port writes 1 to semaphore Left port writes 0 to semaphore Right port writes 1 to ...
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... CY7C037-15AC 20 CY7C037-20AC 64K x18 Asynchronous Dual-Port SRAM Speed (ns) Ordering Code [1] 12 CY7C038-12AC 15 CY7C038-15AC 20 CY7C038-20AC CY7C038-20AI Document #: 38-06042 Rev. *C Package Name Package Type A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 100-Pin Thin Quad Flat Pack A100 ...
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Package Diagram 100-Pin Thin Plastic Quad Flat Pack (TQFP) A100 100-Pin Pb-Free Thin Plastic Quad Flat Pack (TQFP) A100 All products and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-06042 Rev. ...
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Document History Page Document Title: CY7C027/028, CY7C037/038 32K/64K x 16/18 Dual-Port Static RAM Document Number: 38-06042 Issue Orig. of REV. ECN NO. Date Change ** 110190 09/29/01 SZV *A 122292 12/27/02 RBI *B 236765 6/23/04 YDT *C 377454 See ECN ...