CY7C09089-12AC Cypress Semiconductor Corporation., CY7C09089-12AC Datasheet

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CY7C09089-12AC

Manufacturer Part Number
CY7C09089-12AC
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

Specifications of CY7C09089-12AC

Case
QFP-100L

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Part Number
Manufacturer
Quantity
Price
Part Number:
CY7C09089-12AC
Manufacturer:
CY
Quantity:
1 477
25/0251
Cypress Semiconductor Corporation
Document #: 38-06039 Rev. *A
Features
Notes:
1.
2.
3.
• True dual-ported memory cells which allow simulta-
• Six Flow-Through/Pipelined devices
• Three Modes
• Pipelined output mode on both ports allows fast 100-
• 0.35-micron CMOS for optimum speed/power
• High-speed clock to data access 6.5
Logic Block Diagram
R/W
OE
CE
CE
FT/Pipe
I/O
A
CLK
ADS
CNTEN
CNTRST
neous access of the same memory location
MHz cycle time
(max.)
— 64K x 8/9 organizations (CY7C09089/189)
— 128K x 8/9 organizations (CY7C09099/199)
— Flow-Through
— Pipelined
— Burst
0
See page 7 for Load Conditions.
I/O
A
–A
0L
0L
1L
0
L
–A
0
L
L
L
–I/O
–I/O
[3]
15/16L
15
L
L
for 64K; and A
7
[2]
L
7/8L
for x8 devices; I/O
16/17
0
–A
For the most recent information, visit the Cypress web site at www.cypress.com
16
0
for 128K devices.
–I/O
8/9
0/1
0/1
1
0
1
Counter/
Address
Register
8
Decode
for x9 devices.
0
[1]
/7.5/9/12 ns
3901 North First Street
Control
I/O
True Dual-Ported
Synchronous Dual-Port Static RAM
RAM Array
• Low operating power
• Fully synchronous interface for easier operation
• Burst counters increment addresses internally
• Dual Chip Enables for easy depth expansion
• Automatic power-down
• Commercial and Industrial temperature ranges
• Available in 100-pin TQFP
• Pin-compatible and functionally equivalent to IDT70908
and IDT709089
— Active = 195 mA (typical)
— Standby = 0.05 mA (typical)
— Shorten cycle times
— Minimize bus noise
— Supported in Flow-Through and Pipelined modes
Control
I/O
San Jose
0
Counter/
Register
Address
Decode
CA 95134
0/1
1
1
0
0/1
64K/128K x 8/9
8/9
Revised December 27, 2002
CY7C09089/99
CY7C09189/99
16/17
I/O
408-943-2600
A
0R
CNTRST
0
FT/Pipe
CNTEN
–A
–I/O
ADS
[3]
15/16R
R/W
CLK
CE
CE
OE
[2]
7/8R
0R
1R
R
R
R
R
R
R
R
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Related parts for CY7C09089-12AC

CY7C09089-12AC Summary of contents

Page 1

... Features • True dual-ported memory cells which allow simulta- neous access of the same memory location • Six Flow-Through/Pipelined devices — 64K x 8/9 organizations (CY7C09089/189) — 128K x 8/9 organizations (CY7C09099/199) • Three Modes — Flow-Through — Pipelined — Burst • Pipelined output mode on both ports allows fast 100- MHz cycle time • ...

Page 2

... Functional Description The CY7C09089/99 and CY7C09189/99 are high-speed syn- chronous CMOS 64K and 128K x 8/9 dual-port static RAMs. Two ports are provided, permitting independent, simultaneous access for reads and writes to any location in memory. isters on control, address, and data lines allow for minimal set- up and hold times ...

Page 3

... OEL 22 [6] 23 FT/PIPEL Notes: 5. This pin is NC for CY7C09089. 6. For CY7C09089, pin #23 connected equivalent to an IDT x8 pipelined device; connecting pin #23 and #53 to GND is equivalent to an IDT x8 flow- CC through device. Document #: 38-06039 Rev. *A 100-Pin TQFP (Top View CY7C09099 (128K x 8) CY7C09089 (64K x 8) ...

Page 4

... CY7C09089/99 CY7C09189/ A7R 72 A8R 71 A9R 70 A10R 69 A11R 68 A12R 67 A13R 66 A14R 65 A15R [7] 64 A16R 63 GND CE0R 57 CE1R 56 CNTRSTR 55 R/WR 54 OER 53 FT/PIPER 52 GND CY7C09089/99 CY7C09089/99 CY7C09189/99 CY7C09189/ 215 195 35 30 0.05 0.05 Page [+] Feedback ...

Page 5

... I/O –I Output Current into Outputs (LOW)............................. 20 mA Static Discharge Voltage ........................................... >2001V Latch-Up Current...................................................... >200mA Operating Range Range Temperature Commercial [9] Industrial CY7C09089/99 CY7C09189/99 AND CE must be asserted MAX for x9 devices). Ambient V CC 0°C to +70°C 5V 10% 40°C to +85°C ...

Page 6

... Test Conditions T = 25° MHz 5.0V CC AND CE must be asserted to their active states ( CY7C09089/99 CY7C09189/99 -9 -12 Unit 2.4 2.4 V 0.4 0.4 V 2.2 2.2 V 0.8 0 210 350 195 305 mA 245 ...

Page 7

... Document #: 38-06039 Rev 250 TH OUTPUT 1.4V TH (b) Thévenin Equivalent (Load 1) [11] ALL INPUT PULSES 3.0V 90% 10% GND Capacitance (pF) (b) Load Derating Curve CY7C09089/99 CY7C09189/ 893 OUTPUT 347 (c) Three-State Delay (Load 2) (Used for & t CKLZ OLZ OHZ including scope and jig) 90% 10 Page [+] Feedback ...

Page 8

... Test conditions used are Load 2. 13. This parameter is guaranteed by design, but is not production tested. Document #: 38-06039 Rev. *A CY7C09089/99 CY7C09189/99 [ Min. Max. Min. Max. Min. Max 100 6.5 7.5 12 6 6.5 7 CY7C09089/99 CY7C09189/99 -12 Min. Max. Unit 33 MHz 50 MHz Page [+] Feedback ...

Page 9

... n+1 t OHZ [14, 15, 16, 17 CL2 A A n+1 n+2 t CD2 CKLZ = following the next rising edge of the clock constantly loads the address on the rising edge of the CLK. Numbers are for reference only. IL CY7C09089/99 CY7C09189/ n+3 t CKHZ Q n OLZ n n+1 n+2 t OHZ t OLZ ...

Page 10

... Document #: 38-06039 Rev CD2 HC CD2 CKHZ CKLZ [20, 21, 22, 23] NO MATCH t CD1 NO MATCH t CWDD VALID . for the left port, which is being written to. IH CY7C09089/99 CY7C09189/ CD2 CKHZ CKLZ CD2 CKHZ CD2 CKLZ t CD1 VALID >maximum specified, then data is not CWDD CCS Page [+] Feedback ...

Page 11

... During “No Operation,” data in memory at the selected address may be corrupted and should be rewritten to ensure data integrity. Document #: 38-06039 Rev. *A [17, 24, 25, 26 n+1 n CD2 CKHZ OPERATION [17, 24, 25, 26 n+1 n+2 n n+2 n+3 t CD2 OHZ WRITE . IH CY7C09089/99 CY7C09189/ n+3 n CD2 CKLZ Q n+3 WRITE READ A A n+4 n CKLZ CD2 Q n+4 READ Page [+] Feedback ...

Page 12

... DATA OUT OE Document #: 38-06039 Rev. *A [15, 18, 24, 25 n+1 n+2 n n+2 t CD1 Q n+1 t CKHZ NO READ OPERATION [15, 18, 24, 25 n+1 n+2 n n+2 n OHZ READ WRITE CY7C09089/99 CY7C09189/ n+3 n CD1 CD1 Q n CKLZ WRITE READ A A n+4 n CD1 t CD1 Q n CKLZ DC READ Page [+] Feedback ...

Page 13

... Document #: 38-06039 Rev. *A [27 SAD t t SCN t CD2 n+1 COUNTER HOLD READ WITH COUNTER [27 n+1 COUNTER HOLD READ WITH COUNTER . IH CY7C09089/99 CY7C09189/99 HAD HCN Q Q n+2 n+3 READ WITH COUNTER t t SAD HAD t t SCN HCN Q Q n+2 n+3 READ WITH COUNTER ...

Page 14

... The “Internal Address” is equal to the “External Address” when ADS = V Document #: 38-06039 Rev. *A [28, 29 n+1 n+1 n+2 WRITE WITH WRITE COUNTER COUNTER HOLD and equals the counter output when ADS = V IL CY7C09089/99 CY7C09189/ n+2 n+3 n n+3 n+4 WRITE WITH COUNTER . IH Page ...

Page 15

... HRST CNTRST t SD DATA DATA OUT COUNTER RESET Notes: 30 31. No dead cycle exists during counter reset. A READ or WRITE cycle may be coincidental with the counter reset. Document #: 38-06039 Rev WRITE READ ADDRESS 0 ADDRESS 0 ADDRESS 1 CY7C09089/99 CY7C09189 READ READ ADDRESS n Page [+] Feedback ...

Page 16

... CNTRST I/O Mode Reset out( Load out( Hold out( Increment out(n+ CY7C09089/99 CY7C09189/99 Operation [35] Deselected [35] Deselected Write [33] Read Outputs Disabled Operation Counter Reset to Address 0 Address Load into Counter External Address Blocked—Counter Disabled Counter Enabled—Internal Address Generation Page [+] Feedback ...

Page 17

... Ordering Information 64K x8 Synchronous Dual-Port SRAM Speed (ns) Ordering Code [1] 6.5 CY7C09089-6AC 7.5 CY7C09089-7AC 9 CY7C09089-9AC 12 CY7C09089-12AC 128K x8 Synchronous Dual-Port SRAM Speed (ns) Ordering Code 6.5 CY7C09099-6AC 7.5 CY7C09099-7AC 9 CY7C09099-9AC CY7C09099-9AI 12 CY7C09099-12AC 64K x9 Synchronous Dual-Port SRAM Speed (ns) Ordering Code 6.5 CY7C09189-6AC 7.5 CY7C09189-7AC 9 CY7C09189-9AC ...

Page 18

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C09089/99 CY7C09189/99 ...

Page 19

... Document Title: CY7C09089/99, CY7C09189/99 64K/128K x 8/9 Synchronous Dual Port Static RAM Document Number: 38-06039 Issue REV. ECN NO. Date Change ** 110187 10/21/01 *A 122289 12/27/02 Document #: 38-06039 Rev. *A Orig. of Description of Change SZV Change from Spec number: 38-00663 to 38-06039 RBI Added power up information to maximum ratings information. ...

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