IMIC9531CY Cypress Semiconductor Corporation., IMIC9531CY Datasheet

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IMIC9531CY

Manufacturer Part Number
IMIC9531CY
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
IMIC9531CYT
Manufacturer:
IMI
Quantity:
20 000
Cypress Semiconductor Corporation
Document #: 38-07034 Rev. *E
Features
Note:
1. XIN is the frequency of the clock on the device’s XIN pin.
• Dedicated clock buffer power pins for reduced noise,
• Input clock frequency of 25 MHz to 33 MHz
• Output frequencies of XINx1, XINx2, XINx3 and XINx4
• One output bank of five clocks
• One REF XIN clock output
• SMBus clock control interface for individual clock
• Output clock duty cycle is 50% (± 5%)
• < 250 ps skew between output clocks within a bank
• Output jitter <175 ps
• Spread Spectrum feature for reduced electromagnetic
• OE pin for entire output bank enable control and
• 28-pin SSOP and TSSOP packages
SDATA
crosstalk and jitter
disabling and SSCG control
interference (EMI)
testability
Block Diagram
SSCG#
IA(0:2)
XOUT
S(0,1)
SCLK
XIN
SSCG
Logic
I
Control
Logic
2
C
/N
1
0
PCIX I/O System Clock Generator with EMI
OE
CLK0
CLK1
CLK2
CLK3
CLK4
REF
GOOD#
3901 North First Street
Table 1. Test Mode Logic Table
HIGH
HIGH
HIGH
HIGH
LOW
OE
GOOD#
XOUT
VDDA
Pin Configuration
VDD
VSS
VSS
REF
IA0
IA1
IA2
OE
XIN
S1
S0
Input Pins
HIGH
HIGH
LOW
LOW
San Jose
1
2
3
4
5
6
7
8
9
10
11
12
13
14
S1
X
,
HIGH
HIGH
LOW
LOW
CA 95134
S0
28
27
26
25
24
23
22
21
20
19
18
17
16
15
X
Control Features
SDATA
SCLK
VSS
VDDP
CLK0
CLK2
VSS
VDDP
CLK3
VDDA
SSCG#
CLK1
CLK4
VSS
[1]
Three-state Three-state
2 * XIN
3 * XIN
4 * XIN
Revised August 30, 2004
CLK
XIN
Output Pins
408-943-2600
C9531
REF
XIN
XIN
XIN
XIN
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IMIC9531CY Summary of contents

Page 1

Features • Dedicated clock buffer power pins for reduced noise, crosstalk and jitter • Input clock frequency of 25 MHz to 33 MHz • Output frequencies of XINx1, XINx2, XINx3 and XINx4 • One output bank of five clocks • ...

Page 2

Pin Description [2] Pin Name PWR 3 XIN VDDA 4 XOUT VDDA 1 REF VDD 14* OE VDD 24, 23, 22, 19, 18 CLK(0:4) VDDP 8 GOOD# VDD 6*, 7* S(0,1) VDD 20, 25 VDDP 10*, 11*, 12* IA(0:2) ...

Page 3

Serial Data Interface To enhance the flexibility and function of the clock synthesizer, a two-signal serial interface is provided. Through the Serial Data Interface, various device functions, such as individual clock output buffers, can be individually enabled or disabled. The ...

Page 4

Serial Control Registers Byte 0: Output Register Bit @Pup Name 7 1 TESTEN 6 0 SSEN 5 1 SSSEL HWSEL Table 4. Clarification Table for Byte0, bit 5 ...

Page 5

Byte 2: PCI Register (continued) Bit @Pup Name Output Clock Three-state Control All of the clocks in the Bank may be placed in a three-state condition by bringing ...

Page 6

As an example and using this formula for this data sheet’s device, a design that has no discrete loading capacitors (C ) and each of the crystal device PCB traces has a DISC capacitance ( ground of 4 ...

Page 7

Absolute Maximum Conditions Parameter Description V V Core Supply Voltage DD, DDP V Analog Supply Voltage DDA V Input Voltage IN T Temperature, Storage S T Temperature, Operating Ambient A T Temperature, Junction J ESD ESD Protection (Human Body Model) ...

Page 8

... Test and Measurement Set-up Output under Test Probe Load Cap Lumped Load Table 7. Loading Output Name Max Load (in pF) CLK REF Ordering Information Part Number IMIC9531CY IMIC9531CYT IMIC9531CT IMIC9531CTT Lead Free CYI9531OXC CYI9531OXCT CYI9531ZXC CYI9531ZXCT Document #: 38-07034 Rev. *E Condition Measurement at 1.5V Measurement at 1.5V Measurement at 1.5V Measurement at 1 ...

Page 9

Package Drawing and Dimension 28-lead (5.3 mm) Shrunk Small Outline Package O28 28-Lead Thin Shrunk Small Outline Package (4.40-mm Body) Z28.173 0.65[0.025] BSC. 0.85[0.033] 0.95[0.037] 9.60[0.378] 9.80[0.386] All product and company names mentioned in this document may be the trademarks ...

Page 10

... Document #: 38-07034 Rev. *E Description of Change Convert from IMI to Cypress Converted from Word to Frame Corrected Ordering Information by adding tape and reel option IMIC9531CYT and IMIC9531CTT to match the Devmaster Removed the read function in the SMBus Area Added power up requirements to maximum ratings information Fixed DC and AC table to match characteristic data ...

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