MC9S12DG256B Freescale Semiconductor, Inc, MC9S12DG256B Datasheet
MC9S12DG256B
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide Covers also MC9S12DT256C, MC9S12DJ256C, MC9S12DG256C, MC9S12DT256B, MC9S12DJ256B, MC9S12DG256B MC9S12A256B Original Release Date: 29 Mar 2001 Revised: Jan 11, 2005 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com V02.15 DOCUMENT NUMBER 9S12DP256BDGV2/D 1 ...
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... Freescale Semiconductor, Inc. Revision History Version Revision Effective Number Date Date 29 MAR 29 MAR V01.00 2001 2001 8 MAY 8 MAY V01.01 2001 2001 16 May 16 May V02.00 2001 2001 5 June V02.01 2001 14 June V02.02 2001 18 June V02.03 2001 26 June V02.04 2001 11 July V02.05 2001 17 July V02 ...
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... Freescale Semiconductor, Inc. Version Revision Effective Number Date Date 24 August V02.08 2001 12 Nov V02.09 2001 28 Feb V02.10 2002 26 Mar V02.11 2002 12 Aug V02.12 2002 25 Sep V02.13 2002 28 Feb V02.14 2003 11 Jan V02.15 2005 MC9S12DP256B Device User Guide — 9S12DP256BDGV2/D V02.15 Author ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — 9S12DP256BDGV2/D V02.15 4 For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. Table of Contents Section 1 Introduction 1.1 Overview .17 1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 1.3 Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 1.4 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 1.5 Device Memory Map .22 1.6 Detailed Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 1.7 Part ID Assignments .51 Section 2 Signal Description 2.1 Device Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53 2.2 Signal Properties Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56 2.3 Detailed Signal Descriptions .59 2.3.1 EXTAL, XTAL — Oscillator Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 2.3.2 RESET — External Reset Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 2.3.3 TEST — ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 2.3.21 PH7 / KWH7 / SS2 — Port H I/O Pin .62 2.3.22 PH6 / KWH6 / SCK2 — Port H I/O Pin .62 2.3.23 PH5 / KWH5 / MOSI2 — Port H I/O Pin .63 2.3.24 PH4 / KWH4 / MISO2 — Port H I/O Pin .63 2.3.25 PH3 / KWH3 / SS1 — Port H I/O Pin .63 2.3.26 PH2 / KWH2 / SCK1 — ...
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... Freescale Semiconductor, Inc. 2.3.57 PS0 / RXD0 — Port S I/O Pin .67 2.3.58 PT[7:0] / IOC[7:0] — Port T I/O Pins [7: .67 2.4 Power Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67 2.4.1 VDDX,VSSX — Power & Ground Pins for I/O Drivers . . . . . . . . . . . . . . . . . . . . . . . .68 2.4.2 VDDR, VSSR — Power & Ground Pins for I/O Drivers & for Internal Voltage Regulator 68 2.4.3 VDD1, VDD2, VSS1, VSS2 — Core Power Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . .68 2.4.4 VDDA, VSSA — ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Section 7 Clock and Reset Generator (CRG) Block Description 7.1 Device-specific information .81 7.1.1 XCLKS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .81 Section 8 Enhanced Capture Timer (ECT) Block Description Section 9 Analog to Digital Converter (ATD) Block Description Section 10 Inter-IC Bus (IIC) Block Description Section 11 Serial Communications Interface (SCI) Block Description ...
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... Freescale Semiconductor, Inc. A.1.7 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 A.1.8 Power Dissipation and Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . .91 A.1.9 I/O Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .93 A.1.10 Supply Currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .95 A.2 ATD Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97 A.2.1 ATD Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97 A.2.2 Factors influencing accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .97 A.2.3 ATD accuracy .99 A.3 NVM, Flash and EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .101 A.3.1 NVM timing .101 A.3.2 NVM Reliability .103 A.4 Voltage Regulator .105 A.5 Reset, Oscillator and PLL .107 A ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 10 For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. List of Figures Figure 0-1 Order Part Number Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Figure 1-1 MC9S12DP256B Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Figure 1-2 MC9S12DP256B Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Figure 2-1 Pin Assignments in 112-pin LQFP .54 Figure 2-2 Pin Assignments in 80-pin QFP for MC9S12DG256 . . . . . . . . . . . . . . . . . . . . . .55 Figure 2-3 Pin Assignments in 80-pin QFP for MC9S12DJ256 . . . . . . . . . . . . . . . . . . . . . .56 Figure 2-4 PLL Loop Filter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 Figure 3-1 Clock Connections ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 12 For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. List of Tables Table 0-1 Drivative Differences MC9S12D256B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Table 0-2 Derivative Differences MC9S12D256C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Table 0-4 Document References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Table 0-3 Defects fixed on Maskset 2K79X . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Table 1-1 Device Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Table 1-2 Detailed MSCAN Foreground Receive and Transmit Buffer Layout .41 Table 1-3 Assigned Part ID Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 Table 1-4 Memory size registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51 Table 2-1 Signal Properties ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Table A-19 SPI Slave Mode Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118 Table A-20 Expanded Bus Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121 14 For More Information On This Product, Go to: www.freescale.com ...
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... LQFP 112 LQFP/80 QFP 2K79X errata exists An errata exists conntact Sales office conntact Sales office For More Information On This Product, Go to: www.freescale.com MC9S12DG256B MC9S12A256B 2 0 112 LQFP/80 QFP 112 LQFP/80 QFP 0/1K79X 0/1K79X PV/FU An errata exists An errata exists conntact Sales offi ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Table 0-3 shows the defects fixed on maskset 2K79X (MC9S12DP256C) Table 0-3 Defects fixed on Maskset 2K79X Defect MUCts00510 MUCts00604 MUCts00603 This document is part of the customer documentation. A complete set of device manuals also includes the HCS12 Core User Guide and all the individual Block User Guides of the implemented modules effort to reduce redundancy all module specific information is located only in the respective Block User Guide ...
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... Freescale Semiconductor, Inc. Section 1 Introduction 1.1 Overview The MC9S12DP256 microcontroller unit (MCU 16-bit device composed of standard on-chip peripherals including a 16-bit central processing unit (HCS12 CPU), 256K bytes of Flash EEPROM, 12K bytes of RAM, 4K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), three ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 • Two 8-channel Analog-to-Digital Converters – 10-bit resolution – External conversion trigger capability • Five 1M bit per second, CAN 2 software compatible modules – Five receive and three transmit buffers – Flexible identifier filter programmable bit bit bit – ...
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... Freescale Semiconductor, Inc. – 5V A/D converter inputs – Operation at 50MHz equivalent to 25MHz Bus Speed – Development support – Single-wire background debug™ mode (BDM) – On-chip hardware breakpoints 1.3 Modes of Operation User modes • Normal and Emulation Operating Modes – Normal Single-Chip Mode – ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 1.4 Block Diagram Figure 1-1 shows a block diagram of the MC9S12DP256B device. 20 For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. Figure 1-1 MC9S12DP256B Block Diagram 256K Byte Flash EEPROM 12K Byte RAM 4K Byte EEPROM VDDR VSSR Voltage Regulator VREGEN VDD1,2 VSS1,2 Single-wire Background BKGD CPU12 Debug Module XFC Clock and VDDPLL Reset PLL Periodic Interrupt VSSPLL Generation COP Watchdog ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 1.5 Device Memory Map Table 1-1 and Figure 1-2 show the device memory map of the MC9S12DP256B after reset. Note that after reset the bottom 1k of the EEPROM ($0000 - $03FF) are hidden by the register space. Address ...
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... Freescale Semiconductor, Inc. Figure 1-2 MC9S12DP256B Memory Map $0000 $0400 $1000 $4000 $8000 EXTERN $C000 $FF00 VECTORS VECTORS $FFFF EXPANDED* NORMAL SINGLE CHIP * Assuming that a ‘0’ was driven onto port K bit 7 during MCU For More Information On This Product, MC9S12DP256B Device User Guide — V02.15 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 1.6 Detailed Register Map The following tables show the detailed register map of the MC9S12DP256B. $0000 - $000F Address Name Read: $0000 PORTA Write: Read: $0001 PORTB Write: Read: $0002 DDRA Write: Read: $0003 DDRB ...
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... Freescale Semiconductor, Inc. $0010 - $0014 MMC map (Core User Guide) Address Name Bit 7 Read: $0012 EE15 INITEE Write: Read: $0013 MISC Write: Read: Bit 7 $0014 MTST0 Write: $0015 - $0016 INT map (Core User Guide) Address Name Bit 7 Read: $0015 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $001F - $001F Address Name Read: $001F HPRIO Write: $0020 - $0027 Address Name Read: $0020 Reserved Write: Read: $0021 Reserved Write: Read: $0022 Reserved Write: Read: $0023 Reserved Write: Read: $0024 Reserved Write: ...
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... Freescale Semiconductor, Inc. $0030 - $0031 MMC map (Core User Guide) Address Name Bit 7 Read: $0030 PPAGE Write: Read: $0031 Reserved Write: $0032 - $0033 MEBI map (Core User Guide) Address Name Bit 7 Read: $0032 Bit 7 PORTK Write: Read: $0033 Bit 7 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $0040 - $007F Address Name Read: $0040 TIOS Write: Read: $0041 CFORC Write: Read: $0042 OC7M Write: Read: $0043 OC7D Write: Read: $0044 TCNT (hi) Write: Read: $0045 TCNT (lo) Write: Read: $0046 TSCR1 Write: ...
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... Freescale Semiconductor, Inc. $0040 - $007F ECT (Enhanced Capture Timer 16 Bit 8 Channels) Address Name Bit 7 Read: $0059 Bit 7 TC4 (lo) Write: Read: $005A Bit 15 TC5 (hi) Write: Read: $005B Bit 7 TC5 (lo) Write: Read: $005C Bit 15 TC6 (hi) Write: Read: $005D Bit 7 TC6 (lo) Write: Read: $005E ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $0040 - $007F Address Name Read: $0072 PA3H Write: Read: $0073 PA2H Write: Read: $0074 PA1H Write: Read: $0075 PA0H Write: Read: $0076 MCCNT (hi) Write: Read: $0077 MCCNT (lo) Write: Read: $0078 TC0H (hi) ...
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... Freescale Semiconductor, Inc. $0080 - $009F ATD0 (Analog to Digital Converter 10 Bit 8 Channel) Address Name Bit 7 Read: $0088 ATD0TEST0 Write: Read: $0089 ATD0TEST1 Write: Read: $008A Reserved Write: Read: CCF7 $008B ATD0STAT1 Write: Read: $008C Reserved Write: Read: $008D Bit 7 ATD0DIEN Write: Read: ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $00A0 - $00C7 Address Name Read: $00A0 PWME Write: Read: $00A1 PWMPOL Write: Read: $00A2 PWMCLK Write: Read: $00A3 PWMPRCLK Write: Read: $00A4 PWMCAE Write: Read: $00A5 PWMCTL Write: PWMTST Read: $00A6 Test Only ...
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... Freescale Semiconductor, Inc. $00A0 - $00C7 PWM (Pulse Width Modulator 8 Bit 8 Channel) Address Name Bit 7 Read: $00B9 Bit 7 PWMPER5 Write: Read: $00BA Bit 7 PWMPER6 Write: Read: $00BB Bit 7 PWMPER7 Write: Read: $00BC Bit 7 PWMDTY0 Write: Read: $00BD Bit 7 PWMDTY1 Write: Read: $00BE ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $00D0 - $00D7 Address Name Read: $00D0 SCI1BDH Write: Read: $00D1 SCI1BDL Write: Read: $00D2 SCI1CR1 Write: Read: $00D3 SCI1CR2 Write: Read: $00D4 SCI1SR1 Write: Read: $00D5 SCI1SR2 Write: Read: $00D6 SCI1DRH Write: ...
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... Freescale Semiconductor, Inc. $00E0 - $00E7 IIC (Inter IC Bus) Address Name Bit 7 Read: $00E4 D7 IBDR Write: Read: $00E5 Reserved Write: Read: $00E6 Reserved Write: Read: $00E7 Reserved Write: $00E8 - $00EF BDLC (Bytelevel Data Link Controller J1850) Address Name Bit 7 Read: $00E8 IMSG ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $00F8 - $00FF Address Name Read: $00F8 SPI2CR1 Write: Read: $00F9 SPI2CR2 Write: Read: $00FA SPI2BR Write: Read: $00FB SPI2SR Write: Read: $00FC Reserved Write: Read: $00FD SPI2DR Write: Read: $00FE Reserved Write: ...
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... Freescale Semiconductor, Inc. $0100 - $010F Flash Control Register (fts512k4) Address Name Bit 7 Read: $010D Reserved Write: Read: $010E Reserved Write: Read: $010F Reserved Write: $0110 - $011B EEPROM Control Register (eets4k) Address Name Bit 7 Read: EDIVLD $0110 ECLKDIV Write: Read: $0111 Reserved ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $0120 - $013F Address Name Read: $0120 ATD1CTL0 Write: Read: $0121 ATD1CTL1 Write: Read: $0122 ATD1CTL2 Write: Read: $0123 ATD1CTL3 Write: Read: $0124 ATD1CTL4 Write: Read: $0125 ATD1CTL5 Write: Read: $0126 ATD1STAT0 Write: ...
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... Freescale Semiconductor, Inc. $0120 - $013F ATD1 (Analog to Digital Converter 10 Bit 8 Channel) Address Name Bit 7 Read: Bit7 $0139 ATD1DR4L Write: Read: Bit15 $013A ATD1DR5H Write: Read: Bit7 $013B ATD1DR5L Write: Read: Bit15 $013C ATD1DR6H Write: Read: Bit7 $013D ATD1DR6L Write: Read: Bit15 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $0140 - $017F Address Name CAN0IDAR0 - Read: $0150 - $0153 CAN0IDAR3 Write: CAN0IDMR0 - Read: $0154 - $0157 CAN0IDMR3 Write: CAN0IDAR4 - Read: $0158 - $015B CAN0IDAR7 Write: CAN0IDMR4 - Read: $015C - $015F CAN0IDMR7 Write: Read: $0160 - CAN0RXFG $016F ...
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... Freescale Semiconductor, Inc. Table 1-2 Detailed MSCAN Foreground Receive and Transmit Buffer Layout Address Name Bit 7 Extended ID Read: ID14 CANxTIDR2 Write: $xx12 Standard ID Read: Write: Extended ID Read: ID6 CANxTIDR3 Write: $xx13 Standard ID Read: Write: Read: $xx14- CANxTDSR0 - DB7 $xx1B CANxTDSR7 Write: Read: ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $0180 - $01BF Address Name Read: $018D Reserved Write: Read: RXERR7 RXERR6 RXERR5 RXERR4 RXERR3 RXERR2 RXERR1 RXERR0 $018E CAN1RXERR Write: Read: TXERR7 TXERR6 TXERR5 TXERR4 TXERR3 TXERR2 TXERR1 TXERR0 $018F CAN1TXERR Write: ...
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... Freescale Semiconductor, Inc. $01C0 - $01FF CAN2 (Motorola Scalable CAN - MSCAN) Address Name Bit 7 Read: $01C0 RXFRM CAN2CTL0 Write: Read: $01C1 CANE CAN2CTL1 Write: Read: $01C2 SJW1 CAN2BTR0 Write: Read: $01C3 SAMP CAN2BTR1 Write: Read: $01C4 WUPIF CAN2RFLG Write: Read: $01C5 WUPIE ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $01C0 - $01FF Address Name Read: $01D9 CAN2IDAR5 Write: Read: $01DA CAN2IDAR6 Write: Read: $01DB CAN2IDAR7 Write: Read: $01DC CAN2IDMR4 Write: Read: $01DD CAN2IDMR5 Write: Read: $01DE CAN2IDMR6 Write: Read: $01DF CAN2IDMR7 Write: ...
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... Freescale Semiconductor, Inc. $0200 - $023F CAN3 (Motorola Scalable CAN - MSCAN) Address Name Bit 7 Read: $020D Reserved Write: Read: RXERR7 RXERR6 RXERR5 RXERR4 RXERR3 RXERR2 RXERR1 RXERR0 $020E CAN3RXERR Write: Read: TXERR7 TXERR6 TXERR5 TXERR4 TXERR3 TXERR2 TXERR1 TXERR0 $020F CAN3TXERR Write: ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $0240 - $027F Address Name Read: $0240 PTT Write: Read: $0241 PTIT Write: Read: $0242 DDRT Write: Read: $0243 RDRT Write: Read: $0244 PERT Write: Read: $0245 PPST Write: Read: $0246 Reserved Write: ...
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... Freescale Semiconductor, Inc. $0240 - $027F PIM (Port Integration Module PIM_9DP256) Address Name Bit 7 Read: PTIP7 $0259 PTIP Write: Read: $025A DDRP7 DDRP Write: Read: $025B RDRP7 RDRP Write: Read: $025C PERP7 PERP Write: Read: $025D PPSP7 PPSP Write: Read: $025E PIEP7 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $0280 - $02BF Address Name Read: $0280 CAN4CTL0 Write: Read: $0281 CAN4CTL1 Write: Read: $0282 CAN4BTR0 Write: Read: $0283 CAN4BTR1 Write: Read: $0284 CAN4RFLG Write: Read: $0285 CAN4RIER Write: Read: $0286 CAN4TFLG Write: ...
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... Freescale Semiconductor, Inc. $0280 - $02BF Address Name Read: $0299 CAN4IDAR5 Write: Read: $029A CAN4IDAR6 Write: Read: $029B CAN4IDAR7 Write: Read: $029C CAN4IDMR4 Write: Read: $029D CAN4IDMR5 Write: Read: $029E CAN4IDMR6 Write: Read: $029F CAN4IDMR7 Write: Read: $02A0 - CAN4RXFG $02AF Write: Read: ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 The device memory sizes are located in two 8-bit registers MEMSIZ0 and MEMSIZ1 (addresses $001C and $001D after reset). Table 1-4 shows the read-only values of these registers. Refer to section Module Mapping and Control (MMC) of HCS12 Core User Guide for further details. ...
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... Freescale Semiconductor, Inc. Section 2 Signal Description This section describes signals that connect off-chip. It includes a pinout diagram, a table of signal properties, and detailed discussion of signals built from the signal description sections of the Block User Guides of the individual IP blocks on the device. 2.1 Device Pinout The MC9S12DP256B/MC9S12DT256/MC9S12DJ256 and MC9S12DG256 is available in a 112-pin low profile quad flat pack (LQFP) and MC9S12DJ256 is also available in a 80-pin quad flat pack (QFP) ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 SS1/PWM3/KWP3/PP3 1 SCK1/PWM2/KWP2/PP2 2 MOSI1/PWM1/KWP1/PP1 3 MISO1/PWM0/KWP0/PP0 4 XADDR17/PK3 5 XADDR16/PK2 6 XADDR15/PK1 7 XADDR14/PK0 8 IOC0/PT0 9 IOC1/PT1 10 IOC2/PT2 11 IOC3/PT3 12 VDD1 13 VSS1 14 IOC4/PT4 15 IOC5/PT5 16 IOC6/PT6 17 IOC7/PT7 18 XADDR19/PK5 19 XADDR18/PK4 20 KWJ1/PJ1 21 KWJ0/PJ0 22 MODC/TAGHI/BKGD 23 ADDR0/DATA0/PB0 24 ADDR1/DATA1/PB1 25 ADDR2/DATA2/PB2 26 ADDR3/DATA3/PB3 27 ADDR4/DATA4/PB4 28 Figure 2-1 Pin Assignments in 112-pin LQFP ...
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... Freescale Semiconductor, Inc. SS1/PWM3/KWP3/PP3 1 SCK1/PWM2/KWP2/PP2 2 MOSI1/PWM1/KWP1/PP1 3 MISO1/PWM0/KWP0/PP0 4 IOC0/PT0 5 IOC1/PT1 6 IOC2/PT2 7 IOC3/PT3 8 VDD1 9 VSS1 10 IOC4/PT4 11 IOC5/PT5 12 IOC6/PT6 13 IOC7/PT7 14 MODC/TAGHI/BKGD 15 ADDR0/DATA0/PB0 16 ADDR1/DATA1/PB1 17 ADDR2/DATA2/PB2 18 ADDR3/DATA3/PB3 19 ADDR4/DATA4/PB4 20 Figure 2-2 Pin Assignments in 80-pin QFP for MC9S12DG256 For More Information On This Product, Go to: www.freescale.com MC9S12DP256B Device User Guide — V02.15 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 SS1/PWM3/KWP3/PP3 SCK1/PWM2/KWP2/PP2 MOSI1/PWM1/KWP1/PP1 MISO1/PWM0/KWP0/PP0 IOC0/PT0 IOC1/PT1 IOC2/PT2 IOC3/PT3 VDD1 VSS1 IOC4/PT4 IOC5/PT5 IOC6/PT6 IOC7/PT7 MODC/TAGHI/BKGD ADDR0/DATA0/PB0 ADDR1/DATA1/PB1 ADDR2/DATA2/PB2 ADDR3/DATA3/PB3 ADDR4/DATA4/PB4 Figure 2-3 Pin Assignments in 80-pin QFP for MC9S12DJ256 2.2 Signal Properties Summary Table 2-1summarizes the pin functionality. Signals shown in bold are not available in the 80 pin package. ...
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... TAGLO PE2 R/W — PE1 IRQ — PE0 XIRQ — PH7 KWH7 SS2 PH6 KWH6 SCK2 Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Pin Name Pin Name Power Funct. 4 Funct. 5 Supply — — VDDPLL — — VDDPLL — — VDDR — ...
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... PM4 RXCAN2 RXCAN0 PM3 TXCAN1 TXCAN0 PM2 RXCAN1 RXCAN0 PM1 TXCAN0 TXB PM0 RXCAN0 RXB PP7 KWP7 PWM7 58 Freescale Semiconductor, Inc. Pin Name Pin Name Power Funct. 4 Funct. 5 Supply PERH/ — — VDDR PPSH PERH/ — — VDDR PPSH PERH/ — ...
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... EXTAL, XTAL — Oscillator Pins EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived from the EXTAL input frequency. XTAL is the crystal output. Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Pin Name ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 2.3.2 RESET — External Reset Pin An active low bidirectional control signal, it acts as an input to initialize the MCU to a known start-up state, and an output when an internal MCU function causes a reset. 2.3.3 TEST — Test Pin This input only pin is reserved for test ...
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... Freescale Semiconductor, Inc. 2.3.8 PAD[14:08] / AN[14:08] — Port AD Input Pins of ATD1 PAD14 - PAD08 are general purpose input pins and analog inputs AN[6:0] of the analog to digital converter ATD1. 2.3.9 PAD7 / AN07 / ETRIG0 — Port AD Input Pin of ATD0 PAD7 is a general purpose input pin and analog input AN7 of the analog to digital converter ATD0. It can act as an external trigger input for the ATD0. 2.3.10 PAD[06:00] / AN[06:00] — ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 2.3.15 PE5 / MODA / IPIPE0 — Port E I/O Pin 5 PE5 is a general purpose input or output pin used as a MCU operating mode select pin during reset. The state of this pin is latched to the MODA bit at the rising edge of RESET. This pin is shared with the instruction queue tracking signal IPIPE0 ...
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... Freescale Semiconductor, Inc. 2.3.23 PH5 / KWH5 / MOSI2 — Port H I/O Pin 5 PH5 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. It can be configured as master output (during master mode) or slave input pin (during slave mode) MOSI of the Serial Peripheral Interface 2 (SPI2). ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 2.3.30 PJ6 / KWJ6 / RXCAN4 / SDA — PORT J I/O Pin 6 PJ6 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. It can be configured as the receive pin RXCAN for the Motorola Scalable Controller Area Network controller 4 (CAN4) or the serial data pin SDA of the IIC module. 2.3.31 PJ[1:0] / KWJ[1:0] — ...
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... Freescale Semiconductor, Inc. 2.3.38 PM3 / TXCAN1 / TXCAN0 / SS0 — Port M I/O Pin 3 PM3 is a general purpose input or output pin. It can be configured as the transmit pin TXCAN of the Motorola Scalable Controller Area Network controllers (CAN1 or CAN0). It can be configured as the slave select pin SS of the Serial Peripheral Interface 0 (SPI0). ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 2.3.45 PP4 / KWP4 / PWM4 / MISO2 — Port P I/O Pin 4 PP4 is a general purpose input or output pin. It can be configured to generate an interrupt causing the MCU to exit STOP or WAIT mode. It can be configured as Pulse Width Modulator (PWM) channel 4 output. It can be configured as master input (during master mode) or slave output (during slave mode) pin MISO of the Serial Peripheral Interface 2 (SPI2) ...
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... Freescale Semiconductor, Inc. 2.3.52 PS5 / MOSI0 — Port S I/O Pin 5 PS5 is a general purpose input or output pin. It can be configured as master output (during master mode) or slave input pin (during slave mode) MOSI of the Serial Peripheral Interface 0 (SPI0). 2.3.53 PS4 / MISO0 — Port S I/O Pin 4 PS4 is a general purpose input or output pin. It can be configured as master input (during master mode) or slave output pin (during slave mode) MOSI of the Serial Peripheral Interface 0 (SPI0). 2.3.54 PS3 / TXD1 — ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 2.4.1 VDDX,VSSX — Power & Ground Pins for I/O Drivers External power and ground for I/O drivers. Because fast signal transitions place high, short-duration current demands on the power supply, use bypass capacitors with high-frequency characteristics and place them as close to the MCU as possible ...
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... Freescale Semiconductor, Inc. Table 2-2 MC9S12DP256 Power and Ground Connection Summary Pin Number Nominal Mnemonic 112-pin QFP V 13, 65 DD1 14, 66 SS1 DDR V 40 SSR V 107 DDX V 106 SSX V 83 DDA V 86 SSA DDPLL V 45 SSPLL VREGEN 97 2.4.7 VREGEN — ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 70 For More Information On This Product, Go to: www.freescale.com ...
Page 69
... Freescale Semiconductor, Inc. Section 3 System Clock Description 3.1 Overview The Clock and Reset Generator provides the internal clock signals for the core and all peripheral modules. Figure 3-1 shows the clock connections from the CRG to all modules. Consult the CRG Block User Guide for details on clock generation. ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 72 For More Information On This Product, Go to: www.freescale.com ...
Page 71
... Freescale Semiconductor, Inc. Section 4 Modes of Operation 4.1 Overview Eight possible modes determine the operating configuration of the MC9S12DP256B. Each mode has an associated default memory map and external bus configuration controlled by a further pin. Three low power modes exist for the device. 4.2 Chip Configuration Summary The operating mode out of reset is determined by the states of the MODC, MODB, and MODA pins during reset (Table 4-1) ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Table 4-3 Voltage Regulator VREGEN VREGEN 1 0 4.3 Security The device will make available a security feature preventing the unauthorized read and write of the memory contents. This feature allows: • Protection of the contents of FLASH, • ...
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... Freescale Semiconductor, Inc. 4.3.3 Unsecuring the Microcontroller In order to unsecure the microcontroller, the internal FLASH and EEPROM must be erased. This can be done through an external program in expanded mode. Once the user has erased the FLASH and EEPROM, the part can be reset into special single chip mode. ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 76 For More Information On This Product, Go to: www.freescale.com ...
Page 75
... Freescale Semiconductor, Inc. Section 5 Resets and Interrupts 5.1 Overview Consult the Exception Processing section of the HCS12 Core User Guide for information on resets and interrupts. 5.2 Vectors 5.2.1 Vector Table Table 5-1 lists interrupt sources and vectors in default order of priority. Table 5-1 Interrupt Vector Locations Vector Address ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 $FFC8, $FFC9 Pulse Accumulator B Overflow $FFC6, $FFC7 CRG PLL lock $FFC4, $FFC5 CRG Self Clock Mode $FFC2, $FFC3 $FFC0, $FFC1 $FFBE, $FFBF $FFBC, $FFBD $FFBA, $FFBB $FFB8, $FFB9 $FFB6, $FFB7 CAN0 wake-up ...
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... Freescale Semiconductor, Inc. NOTE: For devices assembled in 80-pin QFP packages all non-bonded out pins should be configured as outputs after reset in order to avoid current drawn from floating inputs. Refer to Table 2-1 for affected pins. 5.3.2 Memory Refer to Table 1-1 for locations of the memories depending on the operating mode after reset. ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 80 For More Information On This Product, Go to: www.freescale.com ...
Page 79
... Freescale Semiconductor, Inc. Section 6 HCS12 Core Block Description Consult the HCS12 Core User Guide for information about the HCS12 core modules, i.e. central processing unit (CPU), interrupt module (INT), module mapping control module (MMC), multiplexed external bus interface (MEBI), breakpoint module (BKP) and background debug mode module (BDM). ...
Page 80
... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Section 10 Inter-IC Bus (IIC) Block Description Consult the IIC Block User Guide for information about the Inter-IC Bus module. Section 11 Serial Communications Interface (SCI) Block Description There are two Serial Communications Interfaces (SCI1 and SCI0) implemented on the MC9S12DP256B device ...
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... Freescale Semiconductor, Inc. This module supports single-cycle misaligned word accesses. Section 18 MSCAN Block Description There are five MSCAN modules (CAN4, CAN3, CAN2, CAN1 and CAN0) implemented on the MC9S12DP256B. Consult the MSCAN Block User Guide for information about the Motorola Scalable CAN Module. ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 • Every supply pair must be decoupled by a ceramic capacitor connected as near as possible to the corresponding pins(C1 - C6). • Central point of the ground star should be the VSSR pin. • Use low ohmic low inductance connections between VSS1, VSS2 and VSSR. ...
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... Freescale Semiconductor, Inc. Figure 20-1 Recommended PCB Layout 112 LQFP VSSX VDD1 C1 VSS1 VSSR VDDR For More Information On This Product, Go to: www.freescale.com MC9S12DP256B Device User Guide — V02.15 VSSA C3 VDDA VSS2 Q1 VSSPLL VDDPLL R1 C2 VDD2 85 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Figure 20-2 Recommended PCB Layout for 80QFP VDD1 C1 VSS1 86 VSSA VSSX VSSR VDDR Q1 VSSPLL VDDPLL R1 For More Information On This Product, Go to: www.freescale.com C3 VDDA VSS2 C2 VDD2 ...
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... Freescale Semiconductor, Inc. Appendix A Electrical Characteristics A.1 General NOTE: The electrical characteristics given in this section are preliminary and should be used as a guide only. Values cannot be guaranteed by Motorola and are subject to change without notice. This supplement contains the most accurate electrical information for the MC9S12DP256B microcontroller available at the time of publication ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 The VDDX, VSSX, VDDR and VSSR pairs supply the I/O pins, VDDR supplies also the internal voltage regulator. VDD1, VSS1, VDD2 and VSS2 are the supply pins for the digital logic, VDDPLL, VSSPLL supply the oscillator and the PLL ...
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... Freescale Semiconductor, Inc. A.1.4 Current Injection Power supply must maintain regulation within operating V operating maximum current conditions. If positive injection current (V injection current may flow out of VDD5 and could result in external power supply going out of regulation. Ensure external VDD5 load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not consuming power ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 2. The device contains an internal voltage regulator to generate the logic and PLL supply out of the I/O supply. The absolute maximum ratings apply when the device is powered from an external source. 3. All digital I/O pins are internally clamped ...
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... Freescale Semiconductor, Inc. A.1.7 Operating Conditions This chapter describes the operating conditions of the device. Unless otherwise noted those conditions apply to all the following data. NOTE: Please refer to the temperature rating of the device ( with regards to the ambient temperature T calculations refer to Section A.1.8 Power Dissipation and Thermal Characteristics ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02. Junction Temperature Ambient Temperature Total Chip Power Dissipation, [W] = Package Thermal Resistance, [ C/W] JA The total power dissipation can be calculated from: P INT = Chip Internal Power Dissipation, [W] Two cases with internal voltage regulator enabled and disabled must be considered: 1 ...
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... Freescale Semiconductor, Inc. Table A-5 Thermal Package Characteristics Num C Rating 1 T Thermal Resistance LQFP112, single sided PCB Thermal Resistance LQFP112, double sided PCB with 2 internal planes 3 T Thermal Resistance LQFP 80, single sided PCB Thermal Resistance LQFP 80, double sided PCB 4 T with 2 internal planes NOTES: 1 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P Input High Voltage T Input High Voltage 2 P Input Low Voltage T Input Low Voltage 3 C Input Hysteresis Input Leakage Current (pins in high impedance input ...
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... Freescale Semiconductor, Inc. A.1.10 Supply Currents This section describes the current consumption characteristics of the device as well as the conditions for the measurements. A.1.10.1 Measurement Conditions All measurements are without output loads. Unless otherwise noted the currents are measured in single chip mode, internal voltage regulator enabled and at 25MHz bus frequency using a 4MHz oscillator in Colpitts mode ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 given. A very good estimate is to take the single chip currents and add the currents due to the external loads. Table A-7 Supply Current Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C Rating Run supply currents ...
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... Freescale Semiconductor, Inc. A.2 ATD Characteristics This section describes the characteristics of the analog to digital converter. A.2.1 ATD Operating Characteristics The Table A-8 shows conditions under which the ATD operates. The following constraints exist to obtain full-scale, full range results SSA DDA beyond the power supply levels that it ties to. If the input level goes outside of this range it will effectively be clipped ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 specifies results in an error of less than 1/2 LSB (2.5mV) at the maximum leakage current. If device or operating conditions are less than worst case or leakage-induced error is acceptable, larger values of source resistance is allowed. A.2.2.2 Source Capacitance When sampling an additional internal capacitor is switched to the input. This can cause a voltage drop due to charge sharing with the external and the pin capacitance ...
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... Freescale Semiconductor, Inc. A.2.3 ATD accuracy Table A-10 specifies the ATD conversion performance excluding any errors due to current injection, input capacitance and source resistance. Table A-10 ATD Conversion Performance Conditions are shown in Table A-4 unless otherwise noted 5.12V. Resulting to one 8 bit count = 20mV and one 10 bit count = 5mV ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 DNL LSB V i-1 $3FF $3FE $3FD $3FC $3FB $3FA $3F9 $3F8 $3F7 $3F6 $3F5 $3F4 $3F3 Figure A-1 ATD Accuracy Definitions NOTE: Figure A-1 shows only definitions, for specification values refer to Table A-10 . ...
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... Freescale Semiconductor, Inc. A.3 NVM, Flash and EEPROM NOTE: Unless otherwise noted the abbreviation NVM (Non Volatile Memory) is used for both Flash and EEPROM. A.3.1 NVM timing The time base for all NVM program or erase operations is derived from the oscillator. A minimum oscillator frequency f is required for performing program or erase operations ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 A.3.1.3 Sector Erase Erasing a 512 byte Flash sector byte EEPROM sector takes: The setup time can be ignored for this operation. A.3.1.4 Mass Erase Erasing a NVM block takes: The setup time can be ignored for this operation. ...
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... Freescale Semiconductor, Inc. 3. Maximum Erase and Programming times are achieved under particular combinations of f Refer to formulae in Sections A.3.1.1 - A.3.1.4 for guidance. 4. urst Programming operations are not applicable to EEPROM 5. Minimum Erase times are achieved under maximum NVM operating frequency f 6. Minimum time, if first word in the array is not blank 7 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 104 For More Information On This Product, Go to: www.freescale.com ...
Page 103
... Freescale Semiconductor, Inc. A.4 Voltage Regulator The on-chip voltage regulator is intended to supply the internal logic and oscillator circuits. No external DC load is allowed. Table A-13 Voltage Regulator Recommended Load Capacitances Rating Load Capacitance on VDD1, 2 Load Capacitance on VDDPLL MC9S12DP256B Device User Guide — V02.15 Symbol C LVDD ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 106 For More Information On This Product, Go to: www.freescale.com ...
Page 105
... Freescale Semiconductor, Inc. A.5 Reset, Oscillator and PLL This section summarizes the electrical characteristics of the various startup scenarios for Oscillator and Phase-Locked-Loop (PLL). A.5.1 Startup Table A-14 summarizes several startup characteristics explained in this section. Detailed description of the startup behavior can be found in the Clock and Reset Generator (CRG) Block User Guide. ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 A.5.1.4 Stop Recovery Out of STOP the controller can be woken external interrupt. A clock quality check as after POR is performed before releasing the clocks to the system. A.5.1.5 Pseudo Stop and Wait Recovery The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in both modes ...
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... Freescale Semiconductor, Inc. A.5.3 Phase Locked Loop The oscillator provides the reference clock for the PLL. The PLL´s Voltage Controlled Oscillator (VCO) is also the system clock source in self clock mode. A.5.3.1 XFC Component Selection This section describes the selection of the XFC components to achieve a good filter characteristics. ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 The loop bandwidth f should be chosen to fulfill the Gardner’s stability criteria by at least a factor of 10, C typical values are 50. = 0.9 ensures a good transient response. f < ------------------------------------------ C And finally the frequency relationship is defined as With the above inputs the resistance can be calculated as: ...
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... Freescale Semiconductor, Inc min1 t nom t max1 The relative deviation its maximum for one clock period, and decreases towards zero for larger nom number of clock periods (N). Defining the jitter as For N < 100, the following equation is a good fit for the maximum jitter: ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 This is very important to notice with respect to timers, serial modules where a pre-scaler will eliminate the effect of the jitter to a large extent. Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P Self Clock Mode frequency ...
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... Freescale Semiconductor, Inc. A.6 MSCAN Table A-17 MSCAN Wake-up Pulse Characteristics Conditions are shown in Table A-4 unless otherwise noted Num C Rating 1 P MSCAN Wake-up dominant pulse filtered 2 P MSCAN Wake-up dominant pulse pass MC9S12DP256B Device User Guide — V02.15 Symbol t WUP t WUP For More Information On This Product, Go to: www ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 114 For More Information On This Product, Go to: www.freescale.com ...
Page 113
... Freescale Semiconductor, Inc. A.7 SPI A.7.1 Master Mode Figure A-5 and Figure A-6 illustrate the master mode timing. Timing values are shown in Table A-18 (OUTPUT) 2 SCK (CPOL 0) (OUTPUT) 4 SCK (CPOL 1) (OUTPUT MISO 2 MSB IN (INPUT) 9 MOSI MSB OUT (OUTPUT configured as output. 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02. (OUTPUT SCK (CPOL 0) (OUTPUT) 4 SCK (CPOL 1) (OUTPUT) 5 MISO MSB IN (INPUT) 9 MOSI PORT DATA MASTER MSB OUT (OUTPUT configured as output 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB. Figure A-6 SPI Master Timing (CPHA =1) ...
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... Freescale Semiconductor, Inc. A.7.2 Slave Mode Figure A-7 and Figure A-8 illustrate the slave mode timing. Timing values are shown in Table A-19. SS (INPUT) SCK (CPOL 0) (INPUT) 2 SCK (CPOL 1) (INPUT) 7 MISO MSB OUT SLAVE (OUTPUT MOSI MSB IN (INPUT) Figure A-7 SPI Slave Timing (CPHA = 0) SS (INPUT) ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Table A-19 SPI Slave Mode Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, CLOAD = 200pF on all outputs Num C Rating 1 P Operating Frequency P SCK Period t = 1./f 1 sck Enable Lead Time 3 D Enable Lag Time ...
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... Freescale Semiconductor, Inc. A.8 External Bus Timing A timing diagram of the external multiplexed-bus is illustrated in Figure A-9 with the actual timing values shown on table Table A-20. All major bus signals are included in the diagram. While both a data write and data read cycle are shown, only one or the other would occur on a particular bus cycle. ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 ECLK PE4 5 9 Addr/Data data (read) PA, PB Addr/Data data (write) PA Non-Multiplexed Addresses PK5:0 ECS PK7 24 R/W PE2 27 LSTRB PE3 30 NOACC PE7 33 IPIPO0 IPIPO1, PE6,5 Figure A-9 General External Bus Timing 120 ...
Page 119
... Freescale Semiconductor, Inc. Table A-20 Expanded Bus Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, C Num C Rating 1 P Frequency of operation (E-clock Cycle time 3 D Pulse width, E low Pulse width, E high 5 D Address delay time D Address valid time to E rise (PW ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Table A-20 Expanded Bus Timing Characteristics Conditions are shown in Table A-4 unless otherwise noted, C Num C Rating 32 D NOACC hold time 33 D IPIPO[1:0] delay time D IPIPO[1:0] valid time to E rise ( IPIPO[1:0] delay time ...
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... Freescale Semiconductor, Inc. Appendix B Package Information B.1 General This section provides the physical dimensions of the MC9S12DP256B packages. MC9S12DP256B Device User Guide — V02.15 For More Information On This Product, Go to: www.freescale.com 123 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 B.2 112-pin LQFP package 0. PIN 1 112 IDENT 1 VIEW 0.050 C1 VIEW AB Figure B-1 112-pin LQFP mechanical dimensions (case no. 987) 124 0. TIPS VIEW ...
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... Freescale Semiconductor, Inc. B.3 80-pin QFP package 0.05 A-B 0. -C- H SEATING PLANE G DATUM -H- PLANE W X DETAIL C Figure B-2 80-pin QFP Mechanical Dimensions (case no. 841B) MC9S12DP256B Device User Guide — V02. -B- B DETAIL - DETAIL C ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 126 For More Information On This Product, Go to: www.freescale.com ...
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... Freescale Semiconductor, Inc. User Guide End Sheet MC9S12DP256B Device User Guide — V02.15 For More Information On This Product, Go to: www.freescale.com 127 ...
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... Freescale Semiconductor, Inc. MC9S12DP256B Device User Guide — V02.15 Home Page: www.freescale.com email: support@freescale.com USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, CH370 1300 N. Alma School Road Chandler, Arizona 85224 (800) 521-6274 480-768-2130 support@freescale.com Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH ...