CY2081 Cypress Semiconductor Corporation., CY2081 Datasheet
CY2081
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CY2081 Summary of contents
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... MHz to 25 MHz crystals. Alternatively, a reference clock between 1 MHz and 30 MHz can be used. The CY2081 also features an output control pin (pin 8), which can be configured as an output enable, power down, frequen- cy select, or suspend input. This gives the user the ability to ...
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... 4 [6] Except Crystal Pins [6] Except Crystal Pins – 0. 0.5V IN Three State Outputs max. 5V (3.3V) operation (15 pF) Power-down Active, 5V Operation =17 pF. L CY2081 Min. Max. 4.5 (3.0) 5.5 (3. (15) 10.0 25.0 1.0 30.0 Min. Typ. Max. 2.4 0.4 2.0 0.8 <100 150 <100 150 250 40 (24) 60 (40) L ...
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... Output clock stable time after power 2.4V 0. Min. Typ. Max. 10 2000 [100 MHz] [500 KHz] 12.5 2000 [80 MHz] [500 KHz] <0.5 1 <0.7 1 <400 500 <250 350 [11] t 40% 50% 60% 1 [11] t 45% 50 < 3.3V 0V CY2081 Unit MHz Page ...
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... DD 0.1 F OUTPUTS Customer Configuration Request Procedure The CY2081 is programmed at the wafer level, and is therefore only available as a factory programmed device. There is no field programming for the CY2081. For CY2081 programmed configurations, design opportunities must per year in production. If the design opportunity ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 8-Lead (150-Mil) SOIC S8 CY2081 51-85066-A Page ...
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... Document Title: CY2081 Three-PLL General Purpose EPROM-Programmable Clock Generator Document Number: 38-07136 Issue REV. ECN NO. Date ** 110245 10/28/01 Document #: 38-07136 Rev. ** Orig. of Change Description of Change SZV Change from Spec number: 38-00463 to 38-07136 CY2081 Page ...