CY24141ZC-3 Cypress Semiconductor Corporation., CY24141ZC-3 Datasheet
CY24141ZC-3
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CY24141ZC-3 Summary of contents
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... Integrated phase-locked loop (PLL) • Low-jitter, high-accuracy output • 3.3V operation with 2.5V/1.68V output • Ultra-linear crystal capacitors Part Number Outputs Input Frequency Range CY24141-3 2 Logic Block Diagram XIN OSC XOUT FS Pin Configurations CY24141ZC-3 16-pin TSSOP XOUT 1 16 XIN VDD 2 15 CLK_A 14 N/C AVDD 3 FS ...
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Pin Summary Pin Name Pin Number SSL N/C 7 N/C 8 CLK_B 9 N DDL N N/C ...
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DC Electrical Characteristics Parameter Description I Output High Current OH3.3 I Output Low Current OL3.3 I Output High Current OH2.5 I Output Low Current OL2.5 I Output High Current OH1.68 I Output Low Current OL1.68 V Input High Voltage IH ...
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... Figure 4. Cycle-Cycle Jitter Ordering Information Ordering Code Package Name CY24141ZC-3 Z16 Document #: 38-07324 Rev. ** PRELIMINARY = 3.15V–3.6V) (continued) Conditions Duty Cycle is defined in Figure 1, 50 Output Clock Rise Time, 20%–80 Output Clock Fall Time, 80%–20 CLK out ...
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Thin Shrunk Small Outline Package (4.40-MM Body) Z16 MediaClock is a trademark of Cypress Semiconductor. All products and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-07324 Rev. ** © Cypress Semiconductor ...
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Document Title: CY24141-3 MediaClock™ Graphics Clock Generator Document Number: 38-07324 Issue REV. ECN NO. Date ** 111593 04/30/02 Document #: 38-07324 Rev. ** PRELIMINARY Orig. of Change Description of Change CKN New Data Sheet CY24141-3 Page ...