CY7C1021V33L-12ZC Cypress Semiconductor Corporation., CY7C1021V33L-12ZC Datasheet

CY7C1021V33L-12ZC

Manufacturer Part Number

CY7C1021V33L-12ZC

Description

64K x 16 Static RAM

Manufacturer

Cypress Semiconductor Corporation.

Datasheet

1.CY7C1021V33L-12ZC.pdf (10 pages)

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Company:

Bonase Electronics (HK) Co., Limited

Part Number:

CY7C1021V33L-12ZC

Manufacturer:

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21 500

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Features

Functional Description

The CY7C1021V is a high-performance CMOS static RAM or-

ganized as 65,536 words by 16 bits. This device has an auto-

matic power-down feature that significantly reduces power

consumption when deselected.

Selection Guide

Cypress Semiconductor Corporation

Logic Block Diagram

Maximum Access Time (ns)

Maximum Operating Current (mA)

Maximum CMOS Standby Current (mA)

• 3.3V operation (3.0V–3.6V)

• High speed

• CMOS for optimum speed/power

• Low Active Power (L version)

• Low CMOS Standby Power (L version)

• Automatic power-down when deselected

• Independent control of upper and lower bits

• Available in 44-pin TSOP II and 400-mil SOJ

• Available in a 48-Ball Mini BGA package

— t

— 576 mW (max.)

— 1.80 mW (max.)

= 10/12/15 ns

DATA IN DRIVERS

COLUMN DECODER

512 X 2048

RAM Array

64K x 16

•

Commercial

3901 North First Street

Writing to the device is accomplished by taking Chip Enable

(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable

(BLE) is LOW, then data from I/O pins (I/O

written into the location specified on the address pins (A

through A

from I/O pins (I/O

specified on the address pins (A

Reading from the device is accomplished by taking Chip En-

able (CE) and Output Enable (OE) LOW while forcing the Write

Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then

data from the memory location specified by the address pins

will appear on I/O

then data from memory will appear on I/O

truth table at the back of this data sheet for a complete descrip-

tion of read and write modes.

The input/output pins (I/O

high-impedance state when the device is deselected (CE

HIGH), the outputs are disabled (OE HIGH), the BHE and BLE

are disabled (BHE, BLE HIGH), or during a write operation (CE

LOW, and WE LOW).

The CY7C1021V is available in 400-mil-wide SOJ, standard

44-pin TSOP Type II, and in 48-ball mini BGA packages.

•

I/O

7C1021V-10

BHE

BLE

San Jose

– I/O

). If Byte High Enable (BHE) is LOW, then data

0.500

210

160

1021V-1

to I/O

through I/O

64K x 16 Static RAM

I/O 1

I/O 2

I/O 3

I/O 4

I/O 5

I/O 6

I/O 7

I/O 8

•

Pin Configuration

A 15

A 14

A 13

A 12

. If Byte High Enable (BHE) is LOW,

A 3

A 2

A 1

A 0

7C1021V-12

through I/O

CA 95134

SOJ / TSOP II

Top View

0.500

200

150

) is written into the location

through A

CY7C1021V

A 5

A 6

A 7

BHE

BLE

I/O 16

I/O 15

I/O 14

I/O 13

I/O 12

I/O 11

I/O 10

I/O 9

A 8

A 9

A 10

A 11

) are placed in a

•

October 18, 1999

to I/O

through I/O

7C1021V-15

408-943-2600

1021V-2

0.500

16 .

190

140

See the

), is

Related parts for CY7C1021V33L-12ZC

CY7C1021V33L-12ZC Summary of contents

Page 1

Features • 3.3V operation (3.0V–3.6V) • High speed — 10/12/ • CMOS for optimum speed/power • Low Active Power (L version) — 576 mW (max.) • Low CMOS Standby Power (L version) — 1.80 mW (max.) ...

Pin Configurations (continued) Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65°C to +150°C Ambient Temperature with Power Applied ............................................. –55°C to +125°C Supply Voltage Relative ...

Page 3

Electrical Characteristics Over the Operating Range Parameter Description V Output HIGH Voltage OH V Output LOW Voltage OL V Input HIGH Voltage IH [1] V Input LOW Voltage IL I Input Load Current IX I Output Leakage OZ Current I ...

Page 4

Switching Characteristics Over the Operating Range Parameter Description READ CYCLE t Read Cycle Time RC t Address to Data Valid AA t Data Hold from Address Change OHA t CE LOW to Data Valid ACE t OE LOW to ...

Page 5

Data Retention Waveform Switching Waveforms [11, 12] Read Cycle No. 1 ADDRESS DATA OUT PREVIOUS DATA VALID [12, 13] Read Cycle No. 2 (OE Controlled) ADDRESS CE t ACE OE BHE, BLE t t DBE t LZBE ...

Page 6

Switching Waveforms (continued) [14, 15] Write Cycle No. 1 (CE Controlled) ADDRESS BHE, BLE DATA I/O Write Cycle No. 2 (BLE or BHE Controlled) ADDRESS t SA BHE, BLE WE CE DATA I/O Notes: 14. Data ...

Page 7

Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, LOW) ADDRESS BHE, BLE DATA I/O Truth Table BLE BHE I High Data ...

Page 8

... Ordering Information Speed (ns) Ordering Code 10 CY7C1021V33-10BAC CY7C1021V33-10VC CY7C1021V33L-10VC CY7C1021V33-10ZC CY7C1021V33L-10ZC 12 CY7C1021V33-12BAC CY7C1021V33-12VC CY7C1021V33L-12VC CY7C1021V33-12ZC CY7C1021V33L-12ZC CY7C1021V33-12BAI CY7C1021V33-12VI 15 CY7C1021V33-15BAC CY7C1021V33L-15BAC CY7C1021V33-15VC CY7C1021V33L-15VC CY7C1021V33-15ZC CY7C1021V33L-15VC CY7C1021V33-15BAI CY7C1021V33L-15BAI CY7C1021V33-15VI CY7C1021V33L-15ZI Document #: 38-00544-D Package Name Package Type BA48 48-Ball Mini Ball Grid Array (7. 7.00 mm) ...

Page 9

Package Diagrams 48-Ball (7. 7.00 mm) FBGA BA48 9 CY7C1021V 51-85096-C ...

Page 10

Package Diagrams (continued) © Cypress Semiconductor Corporation, 1999. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor ...

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