CY7C1049V33-20VC Cypress Semiconductor Corporation., CY7C1049V33-20VC Datasheet

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CY7C1049V33-20VC

Manufacturer Part Number
CY7C1049V33-20VC
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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3
Features
Functional Description
The CY7C1049V33 is a high-performance CMOS Static RAM
organized as 524,288 words by 8 bits. Easy memory expan-
Selection Guide
Cypress Semiconductor Corporation
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby
Current (mA)
Shaded areas contain preliminary information.
• High speed
• Low active power
• Low CMOS standby power (Commercial L version)
• 2.0V Data Retention (660 W at 2.0V retention)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE and OE features
WE
CE
OE
Logic Block Diagram
— t
— 504 mW (max.)
— 1.8 mW (max.)
A
A
A
A
A
A
A
A
A
A
A
10
0
1
2
3
4
5
6
7
8
9
AA
= 15 ns
INPUT BUFFER
DECODER
COLUMN
512K x 8
ARRAY
Com’l/Ind’l
Com’l
POWER
DOWN
L
3901 North First Street
1049V33-12
150
0.5
12
8
1049V33–1
1049V33-15
sion is provided by an active LOW Chip Enable (CE), an active
LOW Output Enable (OE), and three-state drivers. Writing to
the device is accomplished by taking Chip Enable (CE) and
Write Enable (WE) inputs LOW. Data on the eight I/O pins (I/O
through I/O
address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing Write
Enable (WE) HIGH. Under these conditions, the contents of
the memory location specified by the address pins will appear
on the I/O pins.
The eight input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE LOW, and WE LOW).
The CY7C1049V33 is available in a standard 400-mil-wide
36-pin SOJ package with center power and ground (revolution-
ary) pinout.
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
140
0.5
15
0
1
2
3
4
5
6
7
8
7
San Jose
) is then written into the location specified on the
1049V33-17
0
through A
130
0.5
17
GND
512K x 8 Static RAM
8
I/O3
I/O
I/O
V
I/O
WE
Pin Configuration
CE
A
A
A
A
A
CC
A
A
A
A
A
0
1
2
3
4
0
1
2
5
6
7
8
9
18
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
10
11
12
Top View
CA 95134
).
1049V33-20
0
SOJ
through I/O
120
CY7C1049V33
0.5
20
8
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
A
A
A
A
OE
I/O
I/O
GND
V
I/O
I/O
A
A
A
A
A
NC
7
18
17
16
15
CC
14
13
12
11
10
) are placed in a
7
6
5
4
1049V33-25
408-943-2600
June 2, 1999
1049V33–2
110
0.5
25
8
0

Related parts for CY7C1049V33-20VC

CY7C1049V33-20VC Summary of contents

Page 1

... Data Retention (660 W at 2.0V retention) • Automatic power-down when deselected • TTL-compatible inputs and outputs • Easy memory expansion with CE and OE features Functional Description The CY7C1049V33 is a high-performance CMOS Static RAM organized as 524,288 words by 8 bits. Easy memory expan- Logic Block Diagram INPUT BUFFER A ...

Page 2

... OUT CC = Max., = 1/t MAX > > < MAX , Com’l/Ind’l CC – 0.3V, CC Com’l L > V – 0.3V, CC < 0.3V, f CY7C1049V33 [1] ................................ –0. Ambient [2] Temperature +70 C 3.3V – +85 C Max. Min. Max. Min. Max. 2.4 2.4 0.4 0.4 0.4 V 2 ...

Page 3

... Com’l/Ind’ > V – 0.3V, CC Com’ > V – 0.3V < 0.3V, f=0 IN Test Conditions MHz 3.3V CC VENIN EQUIVALENT 3.3V 167 1.73V GND (b) 3 CY7C1049V33 7C1049V33-20 7C1049V33-25 Max. Min. Max. 2.4 2.4 0.4 0.4 2 0 0.8 –0.5 0.8 –1 +1 –1 +1 –1 +1 –1 +1 120 ...

Page 4

... HZCE LZCE HZOE LZOE HZWE and t HZWE 4 CY7C1049V33 7C1049V33-17 Max. Min. Max. Unit ...

Page 5

... Over the Operating Range (For L version only) Conditions 2.0V > V – 0. > V – 0. CY7C1049V33 7C1049V33-25 Max. Min. Max. Unit ...

Page 6

... WE is HIGH for read cycle. 13. Address valid prior to or coincident with CE transition LOW. DATA RETENTION MODE 3.0V V > CDR OHA DOE DATA VALID 50 CY7C1049V33 3. 1049V33-5 DATA VALID 1049V33–6 t HZOE t HZCE HIGH IMPEDANCE 50 1049V33–7 ...

Page 7

... WC t SCE PWE t SD DATA VALID IN [15 SCE PWE t SD DATA VALID – I/O Mode 7 Power-Down Read Write Selected, Outputs Disabled 7 CY7C1049V33 1049V33– LZWE 1049V33-9 Power Standby ( Active ( Active ( Active ( ...

Page 8

... CY7C1049V33-12VC CY7C1049V33L-12VC 15 CY7C1049V33-15VC CY7C1049V33L-15VC 17 CY7C1049V33-17VC CY7C1049V33L-17VC 20 CY7C1049V33-20VC CY7C1049V33L-20VC CY7C1049V33-20VI 25 CY7C1049V33-25VC CY7C1049V33-25VI Document #: 38–00643–B Package Diagram © Cypress Semiconductor Corporation, 1999. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...

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