CY7C187-25VXC Cypress Semiconductor Corporation., CY7C187-25VXC Datasheet

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CY7C187-25VXC

Manufacturer Part Number
CY7C187-25VXC
Description
Manufacturer
Cypress Semiconductor Corporation.
Datasheet

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Part Number:
CY7C187-25VXC
Quantity:
29
Cypress Semiconductor Corporation
Document #: 38-05044 Rev. *A
Features
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum CMOS Standby Current (mA)
• High speed
• CMOS for optimum speed/power
• Low active power
• Low standby power
• TTL compatible inputs and outputs
• Automatic power-down when deselected
• Available in Pb-free and non Pb-free 22-pin (300-Mil)
— 15 ns
— 495 mW
— 110 mW
Molded DIP and 24-pin (300-Mil) Molded SOJ
A
A
A
A
Logic Block Diagram
A
A
A
A
12
13
14
15
0
1
2
3
INPUT BUFFER
COLUMN DECODER
ARRAY
16K x 1
POWER
DOWN
198 Champion Court
C187–1
DI
DO
CE
WE
Functional Description
The CY7C187 is a high-performance CMOS static RAM
organized as 65,536 words x 1 bit. Easy memory expansion is
provided by an active LOW Chip Enable (CE) and tri-state
drivers. The CY7C187 has an automatic power-down feature,
reducing the power consumption by 56% when deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and Write Enable (WE) inputs are both LOW. Data on the
input pin (D
the address pins (A
Reading the device is accomplished by taking the Chip Enable
(CE) LOW, while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location
specified on the address pin will appear on the data output
(D
The output pin stays in high-impedance state when Chip
Enable (CE) is HIGH or Write Enable (WE) is LOW.
The CY7C187 utilizes a die coat to insure alpha immunity.
OUT
) pin.
-15
D
15
90
20
GND
OUT
WE
NC
A
A
A
A
A
A
A
A
San Jose
0
1
2
3
4
5
6
7
IN
) is written into the memory location specified on
Top View
10
11
12
1
2
3
4
5
6
7
8
9
SOJ
0
,
through A
Pin Configurations
CA 95134-1709
C187–3
64K x 1 Static RAM
24
23
22
21
20
19
18
17
16
15
14
13
-25
25
70
20
V
A
A
A
A
NC
A
A
A
A
D
CE
CC
15
14
13
12
11
10
9
8
IN
15
Revised July 24, 2006
).
D
GND
WE
OUT
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
Top View
1
2
3
4
5
6
7
8
9
10
11
DIP
CY7C187
408-943-2600
-35
35
70
20
22
21
20
19
18
17
16
15
14
13
12
C187–2
V
A
A
A
A
A
A
A
A
D
CE
CC
15
14
13
12
11
10
9
8
IN
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Related parts for CY7C187-25VXC

CY7C187-25VXC Summary of contents

Page 1

... OUT The output pin stays in high-impedance state when Chip Enable (CE) is HIGH or Write Enable (WE) is LOW. The CY7C187 utilizes a die coat to insure alpha immunity. SOJ DI Top View ...

Page 2

... Test Conditions T = 25° MHz 5. 329 Ω 3.0V 5V GND R2 202 Ω INCLUDING JIG AND SCOPE C187–4 (b) Equivalent to: power-up, otherwise I CC CY7C187 .........................................–0.5V to +7.0V Ambient Temperature V CC ° ° 5V ± 10 +70 C -15 -25 and -35 Max. Min. Max. Unit 2.4 V 0.4 ...

Page 3

... OHA is less than t for any given device. HZCE LZCE CY7C187 -25 -35 Max. Min. Max. Unit ...

Page 4

... Address valid prior to or coincident with CE transition LOW. Document #: 38-05044 Rev DATA VALID 50 SCE PWE t SD DATA VALID t HZWE CY7C187 t HZCE HIGH IMPEDANCE t PD ICC 50% ISB C187– LZWE HIGH IMPEDANCE C187–8 Page ...

Page 5

... CC V =5. 0.0 –55 25 125 AMBIENT TEMPERATURE (°C) NORMALIZED ACCESS TIME vs. AMBIENT TEMPERATURE 1.6 1.4 1.2 1.0 V =5.0V CC 0.8 0.6 –55 25 125 AMBIENT TEMPERATURE (°C) CY7C187 C187–9 OUTPUT SOURCE CURRENT vs. OUTPUT VOLTAGE 120 100 80 V =5. =25° 0.0 1.0 2.0 3.0 4.0 OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs ...

Page 6

... OUTPUT LOADING 30.0 25.0 20.0 15.0 10.0 V =4. =25°C A 5.0 0.0 0 200 400 600 800 1000 CAPACITANCE (pF) Pin Number Deselect/Power-Down Read Write CY7C187 NORMALIZED I vs.CYCLE TIME CC 1.25 V =5. =25° =0.5V CC 1.00 0.75 0. CYCLE FREQUENCY (MHz) Mode Page [+] Feedback ...

Page 7

... Ordering Information Speed (ns) Ordering Code 15 CY7C187-15PXC 25 CY7C187-25PC CY7C187-25VC CY7C187-25VXC 35 CY7C187-35VXC Package Diagrams 11 12 1.070 1.120 0.140 0.190 0.115 0.160 0.090 0.110 Document #: 38-05044 Rev. *A Package Package Diagram 51-85012 22-pin (300-Mil) Molded DIP (Pb-free) 51-85012 22-pin (300-Mil) Molded DIP 51-85030 24-pin (300-Mil) Molded SOJ ...

Page 8

... SOJ (51-85030) PIN DIMENSIONS IN INCHES[MM] REFERENCE JEDEC MO-088 0.291[7.39] 0.330[8.38] PACKAGE WEIGHT 0.75gms 0.300[7.62] 0.350[8.89] V24.3 24 VZ24.3 SEATING PLANE 0.120[3.05] 0.140[3.55] 0.004[0.10] 0.025[0.63] MIN. CY7C187 MIN. MAX. PART # STANDARD PKG. LEAD FREE PKG. 0.007[0.17] 0.013[0.33] 0.262[6.65] 0.272[6.91] 51-85030-*B Page [+] Feedback ...

Page 9

... Document History Page Document Title: CY7C187 64K x 1 Static RAM Document Number: 38-05044 Issue Orig. of REV. ECN NO. Date Change ** 107146 09/10/01 SZV *A 486744 See ECN NXR Document #: 38-05044 Rev. *A Description of Change Change from Spec number: 38-00038 to 38-05044 Removed 20 ns speed bin Changed Low standby power from 220mW to 110mW ...

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