MPC990 Freescale Semiconductor, Inc, MPC990 Datasheet

no-image

MPC990

Manufacturer Part Number
MPC990
Description
Manufacturer
Freescale Semiconductor, Inc
Datasheet
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low Voltage PLL Clock Driver
driver. The fully differential design ensures optimum skew and PLL jitter
performance. The performance of the MPC990/991 makes the device
ideal for Workstation, Mainframe Computer and Telecommunication
applications. The MPC990 and MPC991 devices are identical except in
the interface to the reference clock for the PLL. The MPC990 offers an
on–board crystal oscillator as the PLL reference while the MPC991 offers
a differential ECL/PECL input for applications which need to lock to an
existing clock signal. Both designs offer a secondary single–ended ECL
clock for system test capabilities.
programmed via the the four fsel pins of the device. There are 16 different
output frequency configurations available in the device. The
configurations include output ratios of 1:1, 2:1, 3:1, 3:2, 4:1, 4:3, 4:3:1 and
4:3:2. The programming table in this data sheet illustrates the various
programming options. The SYNC output monitors the relationship
between the Qa and Qc output banks. The output pulses per the timing
diagrams in this data sheet signal the coincident edges of the two output
banks. This feature is useful for non binary relationships between output frequencies (i.e., 3:2 or 4:3 relationships). The Sync_Sel
input toggles the Qd outputs between sync signals and extensions to the Qc bank of outputs.
programmed independently of the other outputs allowing for unique input vs output frequency relationships. The fselFB inputs
provide 6 different feedback frequencies from the QFB differential output pair.
the MPC991’s use as a “zero” delay buffer. The propagation delay between the input reference and the output is dependent on
the input reference frequency. The selection of higher reference frequencies will provide near zero delay through the device.
directly. This allows the user to single step a design during system debug. Note that the Test_Clk input is routed through the
dividers so that depending on the programming several edges on the Test_Clk input will be needed to get corresponding edge
transitions on the outputs. The VCO_Sel input provides a means of recentering the VCO to provide a broader range of VCO
frequencies for stable PLL operation.
output synchronization and phase–lock. If the VCO is driven beyond its maximum frequency, the VCO can outrun the internal
dividers when the VCO_Sel pin is low. This will also prevent the PLL from achieving lock. Again, a master reset signal will need to
be applied to allow for phase–lock. The device employs a power–on reset circuit which will ensure output synchronization and
PLL lock on initial power–up.
2/97
Motorola, Inc. 1997
Fully Integrated PLL
Output Frequency Up to 400MHz
ECL/PECL Inputs and Outputs
Operates from a 3.3V Supply
Output Frequency Configurable
TQFP Packaging
The MPC990/991 is a 3.3V compatible, PLL based ECL/PECL clock
The MPC990/991 offers three banks of outputs which can each be
The MPC990/991 provides a separate output for the feedback to the PLL. This allows for the feedback frequency to be
The MPC990/991 features an external differential ECL/PECL feedback to the PLL. This external feedback feature allows for
The PLL_En, Ref_Sel and the Test_Clk input pins provide a means of bypassing the PLL and driving the output buffers
If the frequency select or the VCO_Sel pins are changed during operation, a master reset signal must be applied to ensure
50ps Cycle–to–Cycle Jitter
1
REV 2
PLL CLOCK DRIVER
52–LEAD TQFP PACKAGE
LOW VOLTAGE
MPC990
MPC991
CASE 848D–03
FA SUFFIX

Related parts for MPC990

MPC990 Summary of contents

Page 1

... Qd outputs between sync signals and extensions to the Qc bank of outputs. The MPC990/991 provides a separate output for the feedback to the PLL. This allows for the feedback frequency to be programmed independently of the other outputs allowing for unique input vs output frequency relationships. The fselFB inputs provide 6 different feedback frequencies from the QFB differential output pair ...

Page 2

... MPC990 MPC991 39 38 Qb3 40 41 Qb3 42 VCCO Qa0 43 Qa0 44 Qa1 45 Qa1 46 47 Qa2 48 Qa2 Qa3 49 Qa3 50 SYNC_Sel 51 52 VCO_Sel 1 FUNCTION TABLE 1 fsel3 fsel2 MOTOROLA 37 36 ...

Page 3

... Ref_Sel xtal or ECL/PECL SYNC_Sel PHASE VCO DETECTOR LPF FREQUENCY GENERATOR SYNC Figure 2. MPC990/991 Logic Diagram 3 MPC990 MPC991 Logic ‘0’ Logic ‘1’ Enable PLL Bypass PLL fVCO fVCO/2 Test_Clk — Reset Outputs SYNC Outputs Match Qc Outputs Qa0 Qa0 ...

Page 4

... MPC990 MPC991 Qa Qc Sync (Qd Sync (Qd Sync (Qd Sync (Qd Sync (Qd) MOTOROLA 1:1 Mode 2:1 Mode 3:1 Mode 3:2 Mode 4:3 Mode Figure 3. Timing Diagrams TIMING SOLUTIONS BR1333 — Rev 6 ...

Page 5

... Min Typ 10 0.2 47.5 50 Same Frequency 150 250 VCO_Sel = ‘0’ 400 VCO_Sel = ‘1’ 200 75 250 Qa,Qb, Qa,Qb, Qa,Qb, MPC990 MPC991 70 C Max Min Typ Max Unit –0.7 –1.3 –0.7 V –1.4 –2.0 –1.4 V –0.9 –1.1 –0.9 V –1.5 –1.8 –1.5 V ...

Page 6

... The on–board oscillator is completely self contained so that the only external component required is the crystal. As the oscillator is somewhat sensitive to loading on its inputs the user is advised to mount the crystal as close to the MPC990 as possible to avoid any board level parasitics. To facilitate co–location surface mount crystals are recommended, but not required ...

Page 7

... DC voltage drop that will be seen between the V CC supply and the VCCA pin of the MPC990/991. From the data sheet the I VCCA current (the current sourced through the VCCA pin) is typically 15mA (20mA maximum), assuming that a minimum of 3 ...

Page 8

... MPC990 MPC991 4X 0.20 (0.008) H L– VIEW Y 3X –L– –N– θ –H– –T– θ3 SEATING 4X PLANE 0.05 (0.002 VIEW AA MOTOROLA OUTLINE DIMENSIONS FA SUFFIX TQFP PACKAGE CASE 848D-03 ISSUE TIPS 0.20 (0.008) T L–M ...

Page 9

... Mfax : RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609 INTERNET: http://www.mot.com/sps/ TIMING SOLUTIONS BR1333 — Rev 6 MPC990 MPC991 are registered trademarks of Motorola, Inc. Motorola, Inc Equal JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 81–3–3521–8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd. ...

Related keywords