CY7C1069AV33-8ZI Cypress Semiconductor Corporation., CY7C1069AV33-8ZI Datasheet

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CY7C1069AV33-8ZI

Manufacturer Part Number
CY7C1069AV33-8ZI
Description
CY7C1069AV33-8ZI2M x 8 Static RAM
Manufacturer
Cypress Semiconductor Corporation.
Datasheet
Cypress Semiconductor Corporation
Document #: 38-05255 Rev. *D
Features
Functional Description
The CY7C1069AV33 is a high-performance CMOS Static
RAM organized as 2,097,152 words by 8 bits. Writing to the
Selection Guide
Maximum Access Time
Maximum Operating Current
Maximum CMOS Standby Current
• High speed
• Low active power
• Operating voltages of 3.3 ± 0.3V
• 2.0V data retention
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE
Logic Block Diagram
— t
— 1080 mW (max.)
AA
A
A
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
8
9
= 8, 10, 12 ns
INPUT BUFFER
4096 x 4096
DECODER
COLUMN
2M x 8
ARRAY
1
and CE
2
3901 North First Street
features
Commercial
Industrial
Commercial/Industrial
I/O
device is accomplished by enabling the chip (by taking CE
LOW and CE
Reading from the device is accomplished by enabling the chip
(CE
Enable (OE) LOW while forcing the Write Enable (WE) HIGH.
See the truth table at the back of this data sheet for a complete
description of Read and Write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH or CE
during a Write operation (CE
LOW).
The CY7C1069AV33 is available in a 54-pin TSOP II package
with center power and ground (revolutionary) pinout, and a
48-ball fine-pitch ball grid array (FBGA) package.
0
–I/O
WE
CE
OE
CE
1
2
1
7
LOW and CE
2
2
LOW), the outputs are disabled (OE HIGH), or
HIGH) and Write Enable (WE) inputs LOW.
San Jose
2
300
300
Pin Configuration
–8
50
8
HIGH) as well as forcing the Output
I/O
I/O
CE
V
CE
V
V
I/O
V
I/O
NC
NC
WE
V
A
A
NC
A
A
A
NC
NC
CC
CC
SS
A
A
A
A
CC
A
SS
19
18
,
17
16
15
2M x 8 Static RAM
6
7
4
3
2
1
0
1
2
0
1
CA 95134
0
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
1
2
3
4
5
6
7
8
9
10
11
12
Top View
TSOP II
through I/O
1
–10
275
275
10
50
LOW, CE
Revised February 10, 2003
54
53
52
50
49
39
38
37
36
35
34
33
32
31
30
29
28
CY7C1069AV33
51
48
47
46
45
44
43
42
41
40
V
V
NC
I/O
V
I/O
A
A
A
A
A
NC
V
DNU
A
A
A
A
A
NC
V
NC
NC
OE
I/O
A
I/O
SS
SS
CC
9
SS
10
CC
5
6
7
8
11
12
13
14
20
7
) are placed in a
5
4
3
2
2
–12
260
260
12
50
HIGH, and WE
408-943-2600
Unit
mA
mA
ns
1
1

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CY7C1069AV33-8ZI Summary of contents

Page 1

... The input/output pins (I/O high-impedance state when the device is deselected (CE HIGH or CE during a Write operation (CE LOW). and CE features 1 2 The CY7C1069AV33 is available in a 54-pin TSOP II package with center power and ground (revolutionary) pinout, and a 48-ball fine-pitch ball grid array (FBGA) package. I/O –I ...

Page 2

... NC OE CE2 CE1 I I/O 4 I A17 I DNU CY7C1069AV33 Page ...

Page 3

... IN IL MAX CE < 0.3V Commercial/ 2 Max Industrial CC CE > V – 0.3V > V – 0.3V < 0.3V Description MHz CY7C1069AV33 [1] ................................ –0. Ambient Temperature +70 C 3.3V – +85 C –8 –10 –12 Min. Max. Min. Max. Min. 2.4 2.4 2.4 0.4 0.4 2.0 V 2 ...

Page 4

... DD are specified with a load capacitance ( Test Loads. Transition is measured 200 mV LZWE , and WE LOW LOW / CE HIGH 1 2 CY7C1069AV33 R1 317 3.3V OUTPUT R2 5 pF* 351 90% (b) 10% Fall time: > 1V/ns –10 –12 Min. Max. Min. Max ...

Page 5

... WE is HIGH for Read cycle. Document #: 38-05255 Rev. *D DATA RETENTION MODE 3.0V V > CDR OHA [11, 12 ASCE t DOE t LZOE 50 CY7C1069AV33 3. DATA VALID t HZOE t HZSCE IMPEDANCE DATA VALID t PD 50% HIGH Page ...

Page 6

... PWE t HZWE I/O –I/O Mode 0 7 Power-down Power-down Read All Bits Write All Bits Selected, Outputs Disabled transition LOW and CE transition HIGH and active low CY7C1069AV33 LZWE Power Standby ( Standby ( Active (I ...

Page 7

... Ordering Information Speed [16] (ns) Ordering Code 8 CY7C1069AV33-8ZC CY7C1069AV33-8ZI CY7C1069AV33-8BAC CY7C1069AV33-8BAI 10 CY7C1069AV33-10ZC CY7C1069AV33-10ZI CY7C1069AV33-10BAC CY7C1069AV33-10BAI 12 CY7C1069AV33-12ZC CY7C1069AV33-12ZI CY7C1069AV33-12BAC CY7C1069AV33-12BAI Package Diagrams Note: 16. Contact a Cypress Representative for availability of the 48-ball Mini BGA (BA48) package. Document #: 38-05255 Rev. *D Package Name Package Type Z54 54-pin TSOP II ...

Page 8

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. CY7C1069AV33 51-85162-*A ...

Page 9

... Document History Page Document Title: CY7C1069AV33 Static RAM Document Number: 38-05255 Issue REV. ECN NO. Date ** 113724 03/27/02 *A 117060 07/31/02 *B 117990 08/30/02 *C 120385 11/13/02 *D 124441 2/25/03 Document #: 38-05255 Rev. *D Orig. of Change Description of Change NSL New Data Sheet DFP Removed 15-ns bin DFP Added 8-ns bin Changing I for 8, 10, 12 bins ...

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