HYB514175BJ-55 Infineon Technologies AG, HYB514175BJ-55 Datasheet

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HYB514175BJ-55

Manufacturer Part Number
HYB514175BJ-55
Description
256K x 16bit EDO-DRAM
Manufacturer
Infineon Technologies AG
Datasheet
256k
Advanced Information
• 262 144 words by 16-bit organization
• 0 to 70 C operating temperature
• Fast access and cycle time
• RAS access time:
• CAS access time:
• Cycle time:
• Hyper page mode (EDO) cycle time
• High data rate
• Single + 5 V ( 10 %) supply with a built-in
Semiconductor Group
50 ns (-50 version)
55 ns (-55 version)
60 ns (-60 version)
13 ns (-50 & -55 version)
15 ns (-60 version)
89 ns (-50 version)
94 ns (-55 version)
104 ns (-60 version)
20 ns (-50 & -55 version)
25 ns (-60 version)
50 MHz (-50 & -55 version)
40 MHz (-60 version)
V
BB
generator
16-Bit EDO-DRAM
1
• Low Power dissipation
• Standby power dissipation
• Output unlatched at cycle end allows
• Read, write, read-modify write,
• 2 CAS/1 WE control
• All inputs and outputs TTL-compatible
• 512 refresh cycles/16 ms
• Plastic Packages:
max. 1100 mW active (-50 version)
max. 1045 mW active (-55 version)
max. 935 mW active (-60 version)
11 mW standby (TTL)
5.5 mW max. standby (CMOS)
two-dimensional chip selection
CAS-before-RAS refresh, RAS-only
refresh, hidden-refresh and hyper page
(EDO) mode capability
P-SOJ-40-1 400 mil width
HYB 514175BJ-50/-55/-60
1998-10-01

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HYB514175BJ-55 Summary of contents

Page 1

EDO-DRAM Advanced Information • 262 144 words by 16-bit organization • operating temperature • Fast access and cycle time • RAS access time (-50 version (-55 version (-60 ...

Page 2

The HYB 514175BJ is the new generation dynamic RAM organized as 262 144 words by 16-bit. The HYB 514175BJ utilizes CMOS silicon gate process as well as advanced circuit techniques to provide wide operation margins, both internally and for the ...

Page 3

Pin Configuration (top view) Semiconductor Group P-SOJ- N.C. ...

Page 4

WE & UCAS LCAS No.2 Clock Generator Column 9 Address Buffers ( Refresh A2 Controller Refresh Counter ( Row 9 Address Buffers (9) No.1 Clock RAS Generator Block Diagram Semiconductor Group I/O1 ...

Page 5

Absolute Maximum Ratings Operating temperature range ....................................................................................... Storage temperature range.................................................................................... – 150 C Input/output voltage ....................................................................................................... – Power supply voltage..................................................................................................... – Data ...

Page 6

DC Characteristics (cont’ Parameter Standby V supply current CC (RAS = LCAS = UCAS = Average supply current during CC CAS-before-RAS refresh mode Capacitance ...

Page 7

AC Characteristics Parameter RAS hold time CAS hold time CAS to RAS precharge time Transition time (rise and fall) Refresh period Read Cycle Access time ...

Page 8

AC Characteristics Parameter Read-Modify-Write Cycle Read-write cycle time RAS to WE delay time CAS to WE delay time Column address to WE delay time OE ...

Page 9

Notes 1. All voltages are referenced and depend on cycle rate. CC1 CC3 CC4 CC6 and depend on output loading. Specified values are obtained with the output open. CC1 ...

Page 10

V IH RAS UCAS LCAS ASR V IH Address Row I/O (Inputs I/O (Outputs) V ...

Page 11

V IH RAS UCAS LCAS ASR V IH Address Row RAH I/O (Inputs I/O ...

Page 12

V IH RAS UCAS LCAS ASR V IH Address Row RAH I/O (Inputs I/O ...

Page 13

V IH RAS UCAS LCAS ASR V IH Address Row I/O (Inputs I/O (Outputs) ...

Page 14

RCD V IH RAS CRP V IH UCAS LCAS RAH t ASR V IH Address Row RAD I/O ...

Page 15

V IH RAS CRP V IH UCAS LCAS RAH t ASR V IH Row Address Address RAD t WCS ...

Page 16

V IH RAS CSH t RCD V IH UCAS LCAS RAD t t RAH CAH t t ASR ASC V IH Address Row Column RWD t RCS ...

Page 17

V IH RAS UCAS LCAS ASR V IH Address I/O (Outputs "H" or "L" RAS-Only Refresh Cycle Semiconductor Group RAS t RAH Row Hi ...

Page 18

RAS RPC UCAS LCAS ODD V IH I/O (Inputs CDD t OEZ V ...

Page 19

V IH RAS UCAS LCAS RAD t ASC t RAH t ASR V IH Address Row RCS DZC V ...

Page 20

V IH RAS RCD V IH UCAS LCAS RAD t ASC t RAH t ASR V IH Address Row WCS I/O (Input) V ...

Page 21

Read Cycle V IH RAS CSR V IH UCAS LCAS Address WRP I/O (Inputs ...

Page 22

Package Outlines Plastic Package, P-SOJ-40-1 (SMD) (Plastic small outline J-leaded) Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book “Package Information”. SMD = Surface Mounted Device Semiconductor Group HYB 514175BJ/BJL-50/-55/-60 256k 22 16 EDO-DRAM ...

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