HYB5118160BSJ-60 Infineon Technologies AG, HYB5118160BSJ-60 Datasheet

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... Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh, • self refresh Fast page mode capability • 2 CAS / 1 WE • All inputs, outputs and clocks fully TTL-compatible • 1024 refresh cycles / 16 ms • Plastic Package: P-SOJ-42-1 400 mil • Semiconductor Group HYB5118160BSJ-50/-60/-70 -50 -60 - ...

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The HYB 5118160BSJ MBit dynamic RAM organized as 1 048 576 words by 16 bits. The HYB 5118160BSJ utilizes a submicron CMOS silicon gate process technology, as well as advanced circuit techniques to provide wide operating margins, ...

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Vcc I/O1 I/O2 I/O3 I/O4 Vcc I/O5 I/O6 I/O7 I/O8 N.C. N.C. WE RAS N.C. N. Vcc Pin Configuration Truth Table RAS LCAS UCAS ...

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WE . UCAS . LCAS No. 2 Clock Generator Column 10 Address Buffer(10 Refresh Controller Refresh Counter (10 Row 10 Address Buffers(10) No. 1 Clock RAS Generator Block Diagram Semiconductor ...

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Absolute Maximum Ratings Operating temperature range ............................................................................................ °C Storage temperature range.........................................................................................– 150 °C Input/output voltage ................................................................................-0.5 to min (Vcc+0.5,7.0) V Power supply voltage...................................................................................................-1.0V to 7.0 V Power dissipation..................................................................................................................... 1.0 W Data out current (short circuit) ................................................................................................ ...

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DC Characteristics (cont’ ° Parameter V Average supply current, CC during fast page mode: V (RAS = , CAS, address cycling Standby V supply current CC ...

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AC Characteristics 5) ° Parameter common parameters Random read or write cycle time RAS precharge time RAS pulse width CAS pulse width Row address setup time ...

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AC Characteristics (cont’ ° Parameter Output buffer turn-off delay from OE Data to OE low delay CAS high to data delay OE high to data delay ...

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AC Characteristics (cont’ ° Parameter Fast Page Mode Read-Modify-Write Cycle Fast page mode read-write cycle time CAS precharge to WE CAS-before-RAS Refresh Cycle CAS setup time ...

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Notes: 1) All voltages are referenced to VSS. 2) ICC1, ICC3, ICC4 and ICC6 depend on cycle rate. 3) ICC1 and ICC4 depend on output loading. Specified values are measured with the output open. 4) Address can be changed once ...

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V IH RAS UCAS V IL LCAS t ASR V IH Row Address I/O (Inputs I/O (Outputs) V ...

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V IH RAS UCAS V IL LCAS t ASR V IH Row Address I/O (Inputs I/O (Outputs) V ...

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V IH RAS UCAS V IL LCAS t ASR V IH Row Address I/O (Inputs I/O OH (Outputs) V ...

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V IH RAS UCAS LCAS t ASR V IH Address Row I/O (Inputs I/O (Outputs) V ...

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V IH RAS UCAS V IL LCAS t RAH t ASR V IH Address Row RAD I/O IH (Inputs ...

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V IH RAS UCAS V IL LCAS t RAH t ASR V IH Address Row I/O (Inputs ...

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Fast Page Mode Read-Modify-Write Cycle Semiconductor Group HYB 5118160BSJ-50/-60/- 16-DRAM ...

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V IH RAS UCAS V IL LCAS Address I/O (Outputs “H” or “L” RAS-Only Refresh Cycle Semiconductor Group t RAS t RAH ASR Row 18 HYB 5118160BSJ-50/-60/-70 ...

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V IH RAS RPC UCAS V IL LCAS OEZ CDD V IH I/O (Inputs ODD V OH ...

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V IH RAS UCAS LCAS RAD t RAH t ASR V IH Address Row I/O (Inputs ...

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V IH RAS UCAS V IL LCAS t RAH t ASR V IH Address Row I/O (Input I/O (Output “H” or ...

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V IH RAS RPC UCAS V IL LCAS CDD V I/O IH (Inputs ODD t OEZ V OH I/O ...

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Read Cycle: RAS UCAS LCAS Address I/O (Inputs I/O (Outputs ...

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Package Outlines Plastic Package P-SOJ-42 (400 mil) (Small Outline J-lead, SMD) Semiconductor Group HYB 5118160BSJ-50/-60/- 16-DRAM ...