W230-03H Cypress Semiconductor Corporation., W230-03H Datasheet
W230-03H
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W230-03H Summary of contents
Page 1
... Internal pull-up resistors should not be relied upon for setting I/O pins HIGH. Pin function with parentheses determined by MODE pin resistor strapping. Unlike other I/O pins, input FS3 has an internal pull-down resistor. • San Jose • CA 95134 Revised December 26, 2002 W230-03 Spread Spectrum –0.5% OFF ±0.5% OFF –0.5% OFF ± ...
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... P Power Connection: Power supply for core logic, PLL circuitry, SDRAM outputs, PCI outputs, reference outputs, 48-MHz output, and 24_48-MHz output. Connect to 3.3V supply G Ground Connections: Connect all ground pins to the common system ground plane. W230-03 Pin Description Page ...
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... Figure 2. Input Logic Selection Through Jumper Option Document #: 38-07357 Rev. *A PRELIMINARY Upon W230-03 power-up, the first operation is used for input logic selection. During this period, the five I/O pins (7, 8, 25, 26, 48) are three-stated, allowing the output strapping resistor on the l/O pins to pull the pins and their associated capacitive clock load to either a logic HIGH or LOW state. At the end of the 2-ms period, the established logic “ ...
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... I C data stream. Refer to Table 6 for more details. Typical Clock Spread Spectrum Enabled Figure 4. Typical Modulation Profile W230-03 EMI Reduction Non- Spread Speactrum Frequency Span (MHz) Down Spread Page ...
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... Refer to Table 5 The data bits in Data Bytes 0–7 set internal W230-03 registers that control device operation. The data bits are only accepted when the Ad- dress Byte bit sequence is 11010010, as noted above. For description of bit control functions, refer to Table 5, Data Byte Serial Configuration Map ...
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... Clock Output Disable Clock Output Disable Clock Output Disable Clock Output Disable Clock Output Disable (Reserved) quency for 24_48MHz Clock Output Disable Clock Output Disable (Reserved) W230-03 Bit Control See Table 6 See Table 6 See Table 6 Hardware Software See Table 6 ...
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... Clock Output Disable Clock Output Disable (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) (Reserved) W230-03 Bit Control 0 1 Low Active Low Active -- -- -- -- -- -- -- -- -- -- -- -- -- -- ...
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... W230-03 Output Frequency PCI Spread Spectrum 33.3 –0.5% 33.3 OFF 33.3 ±0.5% 31.7 OFF 33.3 –0.5% 33.3 OFF 33.3 ±0.5% 34.0 OFF 34.6 OFF 35.3 OFF 35.6 OFF 36.0 OFF 36.3 OFF 36.6 OFF 37 ...
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... All clock outputs loaded with 6" 60 transmission lines with 20-pF capacitors. 4. W230-03 logic inputs (except FS3) have internal pull-up devices (pull-ups not full CMOS level). Logic input FS3 has an internal pull-down device. Document #: 38-07357 Rev. *A PRELIMINARY above those specified in the operating sections of this specifi- cation is not implied ...
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... X1 input threshold voltage (typical The W230-03 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is 14 pF; this includes typical stray capacitance of short PCB traces to crystal input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected). ...
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... Measured from 0.4V to 2.4V Measured from 2.4V to 0.4V Measured on rising and falling edge at 1.5V Assumes full supply voltage reached within 1 ms from power-up. Short cycles exist prior to fre- quency stabilization. Average value during switching transition. Used for determining series termination value. W230-03 Min. Typ. Max. Unit ...
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... Average value during switching transition. Used for determining series termination value. VDD + V1 3 Length = 5” Length = 5” Figure 5. K7 Open Drain Clock Driver Test Circuit Package Type 48-pin SSOP (300 mils) W230-03 Min. Typ. Max. 24.004 +167 57/34 0 Length = 3 ” T2 20p 1 ...
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... Ceramic C4 = 0.005 =VIA to respective supply plane layer W230- 0.01 F Page ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. PRELIMINARY W230-03 Page ...
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... Document Title: W230-03 Spread Spectrum FTG for VIA K7 Chipset Document Number: 38-07357 Issue REV. ECN NO. Date ** 112252 02/13/02 *A 122905 12/26/02 Document #: 38-07357 Rev. *A PRELIMINARY Orig. of Change DSG Change from Spec number: 38-01035 to 38-07357 RBI Add power up requirements to maximum ratings requirements. W230-03 Description of Change ...